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MC74HC393AN

Description
Dual 4-Stage Binary Ripple Counter
Categorylogic    logic   
File Size109KB,8 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
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MC74HC393AN Overview

Dual 4-Stage Binary Ripple Counter

MC74HC393AN Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMotorola ( NXP )
package instructionDIP,
Reach Compliance Codeunknow
Counting directionUP
seriesHC/UH
JESD-30 codeR-PDIP-T14
JESD-609 codee0
length18.86 mm
Load capacitance (CL)50 pF
Load/preset inputNO
Logic integrated circuit typeBINARY COUNTER
Operating modeASYNCHRONOUS
Number of digits4
Number of functions2
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
propagation delay (tpd)60 ns
Certification statusNot Qualified
Maximum seat height4.69 mm
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typeNEGATIVE EDGE
width7.62 mm
minfmax25 MHz
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Product Preview
MC54/74HC393A
J SUFFIX
CERAMIC PACKAGE
CASE 632–08
1
Dual 4-Stage
Binary Ripple Counter
High–Performance Silicon–Gate CMOS
The MC54/74HC393A is identical in pinout to the LS393. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
This device consists of two independent 4–bit binary ripple counters with
parallel outputs from each counter stage. A
÷
256 counter can be obtained
by cascading the two binary counters.
Internal flip–flops are triggered by high–to–low transitions of the clock
input. Reset for the counters is asynchronous and active–high. State
changes of the Q outputs do not occur simultaneously because of internal
ripple delays. Therefore, decoded output signals are subject to decoding
spikes and should not be used as clocks or as strobes except when gated
with the Clock of the HC393A.
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1
µA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 236 FETs or 59 Equivalent Gates
14
14
1
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
14
1
D SUFFIX
SOIC PACKAGE
CASE 751A–03
DT SUFFIX
TSSOP PACKAGE
CASE 948G–01
14
1
ORDERING INFORMATION
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXAD
MC74HCXXXADT
Ceramic
Plastic
SOIC
TSSOP
LOGIC DIAGRAM
PIN ASSIGNMENT
CLOCK a
RESET a
3, 11
Q1
Q2
Q3
Q4
4, 10
Q1a
Q2a
Q3a
Q4a
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
CLOCK b
RESET b
Q1b
Q2b
Q3b
Q4b
CLOCK
1, 13
BINARY
COUNTER
5, 9
6, 8
RESET
2, 12
PIN 14 = VCC
PIN 7 = GND
FUNCTION TABLE
Inputs
Clock
X
H
L
Reset
H
L
L
L
L
Outputs
L
No Change
No Change
No Change
Advance to
Next State
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
10/95
©
Motorola, Inc. 1995
1
REV 0

MC74HC393AN Related Products

MC74HC393AN MC74HC393ADT MC54HC393AJ MC54-74HC393A
Description Dual 4-Stage Binary Ripple Counter Dual 4-Stage Binary Ripple Counter Dual 4-Stage Binary Ripple Counter Dual 4-Stage Binary Ripple Counter
Maker Motorola ( NXP ) Motorola ( NXP ) Motorola ( NXP ) -
package instruction DIP, TSSOP, TSSOP14,.25 DIP, DIP14,.3 -
Reach Compliance Code unknow unknown unknow -
Counting direction UP UP UP -
series HC/UH HC/UH HC/UH -
JESD-30 code R-PDIP-T14 R-PDSO-G14 R-GDIP-T14 -
JESD-609 code e0 e0 e0 -
length 18.86 mm 5 mm 19.495 mm -
Load capacitance (CL) 50 pF 50 pF 50 pF -
Load/preset input NO NO NO -
Logic integrated circuit type BINARY COUNTER BINARY COUNTER BINARY COUNTER -
Operating mode ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS -
Number of digits 4 4 4 -
Number of functions 2 2 2 -
Number of terminals 14 14 14 -
Maximum operating temperature 125 °C 125 °C 125 °C -
Minimum operating temperature -55 °C -55 °C -55 °C -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY CERAMIC, GLASS-SEALED -
encapsulated code DIP TSSOP DIP -
Package shape RECTANGULAR RECTANGULAR RECTANGULAR -
Package form IN-LINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH IN-LINE -
propagation delay (tpd) 60 ns 60 ns 60 ns -
Certification status Not Qualified Not Qualified Not Qualified -
Maximum seat height 4.69 mm 1.2 mm 5.08 mm -
Maximum supply voltage (Vsup) 6 V 6 V 6 V -
Minimum supply voltage (Vsup) 2 V 2 V 2 V -
Nominal supply voltage (Vsup) 5 V 5 V 5 V -
surface mount NO YES NO -
technology CMOS CMOS CMOS -
Temperature level MILITARY MILITARY MILITARY -
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) -
Terminal form THROUGH-HOLE GULL WING THROUGH-HOLE -
Terminal pitch 2.54 mm 0.65 mm 2.54 mm -
Terminal location DUAL DUAL DUAL -
Trigger type NEGATIVE EDGE NEGATIVE EDGE NEGATIVE EDGE -
width 7.62 mm 4.4 mm 7.62 mm -
minfmax 25 MHz 25 MHz 25 MHz -
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