MC54HC393AJ datasheet, PDF - EEWORLD Datasheet

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MC54HC393AJ: DescriptionDual 4-Stage Binary Ripple Counter; Categorylogic logic; File Size109KB，8 Pages; ManufacturerMotorola ( NXP ); Websitehttps://www.nxp.com

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MC54HC393AJ Overview

Dual 4-Stage Binary Ripple Counter

MC54HC393AJ Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Motorola ( NXP )
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	unknow
Counting direction	UP
series	HC/UH
JESD-30 code	R-GDIP-T14
JESD-609 code	e0
length	19.495 mm
Load capacitance (CL)	50 pF
Load/preset input	NO
Logic integrated circuit type	BINARY COUNTER
Maximum Frequency@Nom-Su	12000000 Hz
MaximumI(ol)	0.0024 A
Operating mode	ASYNCHRONOUS
Number of digits	4
Number of functions	2
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2/6 V
propagation delay (tpd)	60 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	NEGATIVE EDGE
width	7.62 mm
minfmax	25 MHz

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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

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MC54/74HC393A

J SUFFIX

CERAMIC PACKAGE

CASE 632–08

Dual 4-Stage

Binary Ripple Counter

High–Performance Silicon–Gate CMOS

The MC54/74HC393A is identical in pinout to the LS393. The device

inputs are compatible with standard CMOS outputs; with pullup resistors,

they are compatible with LSTTL outputs.

This device consists of two independent 4–bit binary ripple counters with

parallel outputs from each counter stage. A

256 counter can be obtained

by cascading the two binary counters.

Internal flip–flops are triggered by high–to–low transitions of the clock

input. Reset for the counters is asynchronous and active–high. State

changes of the Q outputs do not occur simultaneously because of internal

ripple delays. Therefore, decoded output signals are subject to decoding

spikes and should not be used as clocks or as strobes except when gated

with the Clock of the HC393A.

•

Output Drive Capability: 10 LSTTL Loads

Outputs Directly Interface to CMOS, NMOS, and TTL

Operating Voltage Range: 2 to 6 V

Low Input Current: 1

µA

High Noise Immunity Characteristic of CMOS Devices

In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

•

Chip Complexity: 236 FETs or 59 Equivalent Gates

N SUFFIX

PLASTIC PACKAGE

CASE 646–06

D SUFFIX

SOIC PACKAGE

CASE 751A–03

DT SUFFIX

TSSOP PACKAGE

CASE 948G–01

ORDERING INFORMATION

MC54HCXXXAJ

MC74HCXXXAN

MC74HCXXXAD

MC74HCXXXADT

Ceramic

Plastic

SOIC

TSSOP

LOGIC DIAGRAM

PIN ASSIGNMENT

CLOCK a

RESET a

3, 11

4, 10

Q1a

Q2a

Q3a

Q4a

GND

VCC

CLOCK b

RESET b

Q1b

Q2b

Q3b

Q4b

CLOCK

1, 13

BINARY

COUNTER

5, 9

6, 8

RESET

2, 12

PIN 14 = VCC

PIN 7 = GND

FUNCTION TABLE

Inputs

Clock

Reset

Outputs

No Change

Advance to

Next State

This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.

10/95

Motorola, Inc. 1995

REV 0

MC54HC393AJ Related Products

	MC54HC393AJ	MC74HC393ADT	MC74HC393AN	MC54-74HC393A
Description	Dual 4-Stage Binary Ripple Counter	Dual 4-Stage Binary Ripple Counter	Dual 4-Stage Binary Ripple Counter	Dual 4-Stage Binary Ripple Counter
Maker	Motorola ( NXP )	Motorola ( NXP )	Motorola ( NXP )	-
package instruction	DIP, DIP14,.3	TSSOP, TSSOP14,.25	DIP,	-
Reach Compliance Code	unknow	unknown	unknow	-
Counting direction	UP	UP	UP	-
series	HC/UH	HC/UH	HC/UH	-
JESD-30 code	R-GDIP-T14	R-PDSO-G14	R-PDIP-T14	-
JESD-609 code	e0	e0	e0	-
length	19.495 mm	5 mm	18.86 mm	-
Load capacitance (CL)	50 pF	50 pF	50 pF	-
Load/preset input	NO	NO	NO	-
Logic integrated circuit type	BINARY COUNTER	BINARY COUNTER	BINARY COUNTER	-
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	-
Number of digits	4	4	4	-
Number of functions	2	2	2	-
Number of terminals	14	14	14	-
Maximum operating temperature	125 °C	125 °C	125 °C	-
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-
Package body material	CERAMIC, GLASS-SEALED	PLASTIC/EPOXY	PLASTIC/EPOXY	-
encapsulated code	DIP	TSSOP	DIP	-
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	-
Package form	IN-LINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	IN-LINE	-
propagation delay (tpd)	60 ns	60 ns	60 ns	-
Certification status	Not Qualified	Not Qualified	Not Qualified	-
Maximum seat height	5.08 mm	1.2 mm	4.69 mm	-
Maximum supply voltage (Vsup)	6 V	6 V	6 V	-
Minimum supply voltage (Vsup)	2 V	2 V	2 V	-
Nominal supply voltage (Vsup)	5 V	5 V	5 V	-
surface mount	NO	YES	NO	-
technology	CMOS	CMOS	CMOS	-
Temperature level	MILITARY	MILITARY	MILITARY	-
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	-
Terminal form	THROUGH-HOLE	GULL WING	THROUGH-HOLE	-
Terminal pitch	2.54 mm	0.65 mm	2.54 mm	-
Terminal location	DUAL	DUAL	DUAL	-
Trigger type	NEGATIVE EDGE	NEGATIVE EDGE	NEGATIVE EDGE	-
width	7.62 mm	4.4 mm	7.62 mm	-
minfmax	25 MHz	25 MHz	25 MHz	-

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