MC54HC367J datasheet, PDF - EEWORLD Datasheet

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MC54HC367J: DescriptionHex 3-State Noninverting Buffer with Separate 2-Bit and 4-Bit Sections; Categorylogic logic; File Size75KB，5 Pages; ManufacturerMotorola ( NXP ); Websitehttps://www.nxp.com

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MC54HC367J Overview

Hex 3-State Noninverting Buffer with Separate 2-Bit and 4-Bit Sections

MC54HC367J Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Motorola ( NXP )
package instruction	DIP, DIP16,.3
Reach Compliance Code	unknow
Other features	ONE FUNCTION WITH TWO BITS
Control type	ENABLE LOW
series	HC/UH
JESD-30 code	R-GDIP-T16
JESD-609 code	e0
length	19.495 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
MaximumI(ol)	0.006 A
Number of digits	6
Number of functions	1
Number of ports	2
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP16,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2/6 V
Prop。Delay @ Nom-Su	36 ns
propagation delay (tpd)	36 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Hex 3-State Noninverting

Buffer with Separate 2-Bit

and 4-Bit Sections

High–Performance Silicon–Gate CMOS

The MC54/74HC367 is identical in pinout to the LS367. The device inputs

are compatible with standard CMOS outputs; with pullup resistors, they are

compatible with LSTTL outputs.

This device is arranged into 2–bit and 4–bit sections, each having its own

active–low Output Enable. When either of the enables is high, the affected

buffer outputs are placed into high–impedance states. The HC367 has

noninverting outputs.

•

Output Drive Capability: 15 LSTTL Loads

Outputs Directly Interface to CMOS, NMOS, and TTL

Operating Voltage Range: 2 to 6 V

Low Input Current: 1

µA

High Noise Immunity Characteristic of CMOS Devices

In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

•

Chip Complexity: 92 FETs or 23 Equivalent Gates

MC54/74HC367

J SUFFIX

CERAMIC PACKAGE

CASE 620–10

N SUFFIX

PLASTIC PACKAGE

CASE 648–08

ORDERING INFORMATION

MC54HCXXXJ

MC74HCXXXN

Ceramic

Plastic

PIN ASSIGNMENT

OUTPUT

ENABLE 1

VCC

OUTPUT

ENABLE 2

LOGIC DIAGRAM

GND

FUNCTION TABLE

Inputs

Enable 1,

Enable 2

Output

OUTPUT ENABLE 1 1

OUTPUT ENABLE 2 15

PIN 16 = VCC

PIN 8 = GND

X = don’t care

Z = high impedance

10/95

Motorola, Inc. 1995

REV 6

MC54HC367J Related Products

	MC54HC367J	MC74HC367	MC54HC367	MC54-74HC367
Description	Hex 3-State Noninverting Buffer with Separate 2-Bit and 4-Bit Sections	Hex 3-State Noninverting Buffer with Separate 2-Bit and 4-Bit Sections	Hex 3-State Noninverting Buffer with Separate 2-Bit and 4-Bit Sections	Hex 3-State Noninverting Buffer with Separate 2-Bit and 4-Bit Sections

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