DS2250(T)
Soft Microcontroller Module
www.maxim-ic.com
DESCRIPTION
The DS2250(T) soft microcontroller module is a
fully 8051-compatible 8-bit CMOS microcontroller that
offers “softness” in all aspects of its application.
This is accomplished through the comprehensive
use of nonvolatile technology to preserve all
information in the absence of system V
CC
. The
internal
program/data
memory
space
is
implemented using 8, 32, or 64kbytes of nonvolatile
CMOS SRAM. Furthermore, internal data registers
and key configuration registers are also nonvolatile.
An optional real-time clock gives permanently
powered timekeeping. The clock keeps time to a
hundredth of a second using an on-board crystal.
All nonvolatile memory and resources are
maintained for over 10 years at room temperature in
the absence of power.
FEATURES
8-Bit 8051-Compatible Microcontroller
Adapts to Task-At-Hand
8, 32, or 64kbytes of Nonvolatile RAM for
Program and/or Data Memory Storage
Initial Downloading of Software in End System
via On-Chip Serial Port
Capable of Modifying its Own Program and/or
Data Memory in End Use
High-Reliability Operation
Maintains All Nonvolatile Resources Up to 10
Years in the Absence of V
CC
at Room
Temperature
Power-Fail Reset
Early Warning Power-Fail Interrupt
Watchdog Timer
Software Security Feature
Executes Encrypted Software to Prevent
Unauthorized Disclosure
On-Chip, Full-Duplex Serial I/O Ports
Two On-Chip Timer/Event Counters
32 Parallel I/O Lines
Compatible with Industry Standard 8051
Instruction Set
Permanently Powered Real-Time Clock
Operating information is contained in the Secure Microcontroller
User’s Guide. This data sheet provides ordering information,
pinout, and electrical specifications.
PIN CONFIGURATION
DS2250(T)
1
20
21
40
40-Pin SIMM
ORDERING INFORMATION
PART
DS2250-32-16
DS2250-32-16+
DS2250-64-16
DS2250-64-16#
DS2250T-32-16
DS2250T-32-16+
DS2250T-64-16
DS2250T-64-16+
RAM SIZE (kB)
32
32
64
64
32
32
64
64
MAX CRYSTAL SPEED (MHz)
16
16
16
16
16
16
16
16
TIMEKEEPING?
No
No
No
No
Yes
Yes
Yes
Yes
+ Denotes lead-free/RoHS-compliant package
# Denotes RoHS-compliant device that may contain lead exempt under the RoHS requirements.
1 of 18
REV: 060906
DS2250(T)
DS2250(T) BLOCK DIAGRAM
Figure 1
2 of 18
DS2250(T)
PIN DESCRIPTION
PIN
1, 3, 5, 7, 9,
11, 13, 15
DESCRIPTION
P1.0 - P1.7.
General purpose I/O Port 1
RST
- Active high reset input. A logic 1 applied to this pin will activate a reset state.
17
This pin is pulled down internally so this pin can be left unconnected if not used. An
RC power-on reset circuit is not needed and is not recommended.
P3.0 RXD.
General purpose I/O port pin 3.0. Also serves as the receive signal for the
19
on board UART. This pin should not be connected directly to a PC COM port.
P3.1 TXD.
General purpose I/O port pin 3.1. Also serves as the transmit signal for the
21
on board UART. This pin should not be connected directly to a PC COM port.
P3.2
INT0
.
General purpose I/O port pin 3.2. Also serves as the active low External
23
Interrupt 0.
P3.3
INT1
.
General purpose I/O port pin 3.3. Also serves as the active low External
25
Interrupt 1.
27
P3.4 T0.
General purpose I/O port pin 3.4. Also serves as the Timer 0 input.
29
P3.5 T1.
General purpose I/O port pin 3.5. Also serves as the Timer 1 input.
P3.6
WR
.
General purpose I/O port pin. Also serves as the write strobe for Expanded
31
bus operation.
P3.7
RD
.
General purpose I/O port pin. Also serves as the read strobe for Expanded
33
bus operation.
XTAL2, XTAL1.
Used to connect an external crystal to the internal oscillator.
35, 37
XTAL1 is the input to an inverting amplifier and XTAL2 is the output.
39
GND
- Logic ground.
26, 28, 30, 32,
P2.7-P2.0.
General purpose I/O Port 2. Also serves as the MSB of the Expanded
34, 36, 38, 40 Address bus.
PSEN
- Program Store Enable. This active low signal is used to enable an external
program memory when using the Expanded bus. It is normally an output and should
be unconnected if not used.
PSEN
also is used to invoke the Bootstrap Loader. At this
24
time,
PSEN
will be pulled down externally. This should only be done once the
DS2250(T) is already in a reset state. The device that pulls down should be open-drain
since it must not interfere with
PSEN
under normal operation.
ALE
- Address Latch Enable. Used to de-multiplex the multiplexed Expanded
Address/Data bus on Port 0. This pin is normally connected to the clock input on a
22
’373 type transparent latch. When using a parallel programmer, this pin also assumes
the
PROG
function for programming pulses.
EA
- External Access. This pin forces the DS2250(T) to behave like an 8031. No
internal memory (or clock) will be available when this pin is at a logic low. Since this
20
pin is pulled down internally, it should be connected to +5V to use NV RAM. In a
parallel programmer, this pin also serves as V
PP
for super voltage pulses.
P0.0-P0.7.
General purpose I/O Port 0. This port is open-drain and can not drive a
4, 6, 8, 10, 12,
logic 1. It requires external pullups. Port 0 is also the multiplexed Expanded
14, 16, 18
Address/Data bus. When used in this mode, it does not require pullups.
2
V
CC
+
- 5 volts.
3 of 18
DS2250(T)
INSTRUCTION SET
The DS2250(T) executes an instruction set which is object code-compatible with the industry standard
8051 microcontroller. As a result, software development packages which have been written for the 8051
are compatible with the DS2250(T), including cross-assemblers, high-level language compilers, and
debugging tools. Note that the DS2250(T) is functionally identical to the DS5000(T) except for package
and the 64k memory option.
A complete description for the DS2250(T) instruction set is available in the Secure Microcontroller
User’s Guide.
MEMORY ORGANIZATION
Figure 2 illustrates the address spaces which are accessed by the DS2250(T). As illustrated in the figure,
separate address spaces exist for program and data memory. Since the basic addressing capability of the
machine is 16 bits, a maximum of 64 kbytes of program memory and 64 kbytes of data memory can be
accessed by the DS2250(T) CPU. The 8- or 32-kbyte RAM area inside of the DS2250(T) can be used to
contain both program and data memory. A second 32k RAM is available for data only.
The Real Time Clock (RTC) in the DS2250(T) is reached in the memory map by setting a SFR bit. The
MCON.2 bit (ECE2) is used to select an alternate data memory map. While ECE2=1, all MOVXs will be
routed to this alternate memory map. The real time clock is a serial device that resides in this area. A full
description of the RTC access and example software is given in the Secure Microcontroller User’s Guide.
DS2250(T) MEMORY MAP
Figure 2
DATA MEMORY (MOVX)
4 of 18
DS2250(T)
PROGRAM LOADING
The Program Load Modes allow initialization of the NV RAM Program/Data Memory. This initialization
may be performed in one of two ways:
1. Serial Program Loading which is capable of performing Bootstrap Loading of the DS2250(T). This
feature allows the loading of the application program to be delayed until the DS2250(T) is installed in
the end system.
2. Parallel Program Load cycles which perform the initial loading from parallel address/data information
presented on the I/O port pins. This mode is timing set-compatible with the 87C51H microcontroller
programming mode.
The DS2250(T) is placed in its Program Load configuration by simultaneously applying a logic 1 to the
RST pin and forcing the
PSEN
line to a logic 0 level. Immediately following this action, the DS2250(T)
will look for a parallel Program Load pulse, or a serial ASCII carriage return (0DH) character received at
9600, 2400, 1200, or 300 bps over the serial port.
The hardware configurations used to select these modes of operation are illustrated in Figure 3.
PROGRAM LOADING CONFIGURATIONS
Figure 3
5 of 18
京公网安备 11010802033920号
EEWORLD
