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MC14050B

Description
4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, PDIP16
Categorysemiconductor    logic   
File Size116KB,8 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Download Datasheet Parametric Compare View All

MC14050B Overview

4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, PDIP16

MC14050B Parametric

Parameter NameAttribute value
Number of functions6
Number of terminals16
Maximum operating temperature125 Cel
Minimum operating temperature-55 Cel
Maximum supply/operating voltage18 V
Minimum supply/operating voltage3 V
Rated supply voltage5 V
Processing package descriptionLEAD FREE, PLASTIC, DIP-16
Lead-freeYes
EU RoHS regulationsYes
China RoHS regulationsYes
stateDISCONTINUED
CraftsmanshipCMOS
packaging shapeRECTANGULAR
Package SizeIN-LINE
Terminal formTHROUGH-HOLE
Terminal spacing2.54 mm
terminal coatingMATTE TIN
Terminal locationDUAL
Packaging MaterialsPLASTIC/EPOXY
Temperature levelMILITARY
series4000/14000/40000
Logic IC typeINVERT
Number of inputs1
propagation delay TPD140 ns
MC14049B, MC14050B
Hex Buffer
The MC14049B Hex Inverter/Buffer and MC14050B Noninverting
Hex Buffer are constructed with MOS P−Channel and N−Channel
enhancement mode devices in a single monolithic structure. These
complementary MOS devices find primary use where low power
dissipation and/or high noise immunity is desired. These devices
provide logic level conversion using only one supply voltage, V
DD
.
The input−signal high level (V
IH
) can exceed the V
DD
supply
voltage for logic level conversions. Two TTL/DTL loads can be driven
when the devices are used as a CMOS−to−TTL/DTL converter
(V
DD
= 5.0 V, V
OL
0.4 V, I
OL
3.2 mA).
Note that pins 13 and 16 are not connected internally on these
devices; consequently connections to these terminals will not affect
circuit operation.
Features
http://onsemi.com
SOIC−16
D SUFFIX
CASE 751B
SOEIAJ−16
F SUFFIX
CASE 966
TSSOP−16
DT SUFFIX
CASE 948F
PIN ASSIGNMENT
V
DD
OUT
A
IN
A
OUT
B
IN
B
OUT
C
IN
C
V
SS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
OUT
F
IN
F
NC
OUT
E
IN
E
OUT
D
IN
D
High Source and Sink Currents
High−to−Low Level Converter
Supply Voltage Range = 3.0 V to 18 V
V
IN
can exceed V
DD
Meets JEDEC B Specifications
Improved ESD Protection On All Inputs
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
Symbol
V
DD
V
in
V
out
I
in
I
out
P
D
Parameter
DC Supply Voltage Range
Input Voltage Range (DC or Transient)
Output Voltage Range (DC or Transient)
Input Current (DC or Transient) per Pin
Output Current (DC or Transient) per Pin
Power Dissipation, per Package (Note 1)
(Plastic)
(SOIC)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature (8−Second Soldering)
Value
−0.5 to +18.0
−0.5 to +18.0
−0.5 to V
DD
+
0.5
±
10
±
45
825
740
−55 to +125
−65 to +150
260
°C
°C
°C
Unit
V
V
V
mA
mA
mW
1
16
MARKING DIAGRAMS
16
140xxBG
AWLYWW
1
SOIC−16
16
14
050B
ALYWG
G
1
TSSOP−16
xx
A
WL, L
YY, Y
WW, W
G or
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
SOEIAJ−16
MC140xxB
ALYWG
T
A
T
stg
T
L
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: See Figure 3.
This device contains protection circuitry to protect the inputs against damage
due to high static voltages or electric fields referenced to the V
SS
pin only. Extra
precautions must be taken to avoid applications of any voltage higher than the
maximum rated voltages to this high−impedance circuit. For proper operation, the
ranges V
SS
V
in
18 V and V
SS
V
out
V
DD
are recommended.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V
SS
or V
DD
). Unused outputs must be left open.
©
Semiconductor Components Industries, LLC, 2014
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
1
August, 2014 − Rev. 9
Publication Order Number:
MC14049B/D

MC14050B Related Products

MC14050B MC14049B MC14049
Description 4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, PDIP16 4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, PDIP16 4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, PDIP16
Number of functions 6 6 6
Number of terminals 16 16 16
Maximum operating temperature 125 Cel 125 Cel 125 Cel
Minimum operating temperature -55 Cel -55 Cel -55 Cel
Maximum supply/operating voltage 18 V 18 V 18 V
Minimum supply/operating voltage 3 V 3 V 3 V
Rated supply voltage 5 V 5 V 5 V
Processing package description LEAD FREE, PLASTIC, DIP-16 LEAD FREE, PLASTIC, DIP-16 LEAD FREE, PLASTIC, DIP-16
Lead-free Yes Yes Yes
EU RoHS regulations Yes Yes Yes
China RoHS regulations Yes Yes Yes
state DISCONTINUED DISCONTINUED DISCONTINUED
Craftsmanship CMOS CMOS CMOS
packaging shape RECTANGULAR RECTANGULAR RECTANGULAR
Package Size IN-LINE IN-LINE IN-LINE
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE
Terminal spacing 2.54 mm 2.54 mm 2.54 mm
terminal coating MATTE TIN MATTE TIN MATTE TIN
Terminal location DUAL DUAL DUAL
Packaging Materials PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
Temperature level MILITARY MILITARY MILITARY
series 4000/14000/40000 4000/14000/40000 4000/14000/40000
Logic IC type INVERT INVERT INVERT
Number of inputs 1 1 1
propagation delay TPD 140 ns 140 ns 140 ns
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