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MC10H101P

Description
Quad OR/NOR Gate
Categorylogic    logic   
File Size63KB,3 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
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MC10H101P Overview

Quad OR/NOR Gate

MC10H101P Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMotorola ( NXP )
package instructionPLASTIC, DIP-16
Reach Compliance Codeunknow
Other featuresSTROBED OUTPUTS
series10H
JESD-30 codeR-PDIP-T16
JESD-609 codee0
length19.175 mm
Logic integrated circuit typeOR/NOR GATE
Number of functions4
Number of entries1
Number of terminals16
Maximum operating temperature75 °C
Minimum operating temperature
Output characteristicsOPEN-EMITTER
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP16,.3
Package shapeRECTANGULAR
Package formIN-LINE
Maximum supply current (ICC)29 mA
Prop。Delay @ Nom-Su1.7 ns
propagation delay (tpd)1.6 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height4.44 mm
surface mountNO
technologyECL
Temperature levelCOMMERCIAL EXTENDED
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width7.62 mm
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad OR/NOR Gate
The MC10H101 is a quad 2–input OR/NOR gate with one input from each
gate common to pin 12. This MECL 10H part is a functional/pinout duplication of
the standard MECL 10K family part, with 100% improvement in propagation
delay, and no increases in power–supply current.
Propagation Delay, 1.0 ns Typical
Power Dissipation 25 mW/Gate (same as MECL 10K)
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K–Compatible
MC10H101
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
MAXIMUM RATINGS
Characteristic
Power Supply (VCC = 0)
Input Voltage (VCC = 0)
Output Current — Continuous
— Surge
Operating Temperature Range
Storage Temperature Range — Plastic
— Ceramic
Symbol
VEE
VI
Iout
TA
Tstg
Rating
–8.0 to 0
0 to VEE
50
100
0 to +75
–55 to +150
–55 to +165
Unit
Vdc
Vdc
mA
°C
°C
°C
4
FN SUFFIX
PLCC
CASE 775–02
LOGIC DIAGRAM
2
5
7
3
6
10
14
11
13
12
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
15
9
ELECTRICAL CHARACTERISTICS
(VEE = –5.2 V
±5%)
(See Note)
Characteristic
Power Supply Current
Input Current High
(Pin 12 only)
Input Current Low
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
Symbol
IE
IinH
IinL
VOH
VOL
VIH
VIL
Min
0.5
Max
29
425
850
Min
0.5
25°
Max
26
265
535
Min
0.3
75°
Max
29
265
535
–0.735
–1.60
–0.735
–1.45
Unit
mA
µA
µA
Vdc
Vdc
Vdc
Vdc
–1.02 –0.84 –0.98 –0.81 –0.92
–1.95 –1.63 –1.95 –1.63 –1.95
–1.17 –0.84 –1.13 –0.81 –1.07
–1.95 –1.48 –1.95 –1.48 –1.95
AC PARAMETERS
Propagation Delay
Pin 12 Only
Exclude Pin 12
Rise Time
Fall Time
tpd
0.5
0.5
tr
tf
0.5
0.5
1.6
1.45
2.1
2.1
0.5
0.5
0.5
0.5
1.6
1.5
2.2
2.2
0.5
0.5
0.5
0.5
1.7
1.6
2.3
2.3
ns
ns
ns
VCC1
AOUT
BOUT
AIN
AOUT
BOUT
BIN
VEE
DIP
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC2
DOUT
COUT
DIN
COMMON
INPUT
COUT
CIN
DOUT
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
3/93
©
Motorola, Inc. 1996
2–46
REV 5

MC10H101P Related Products

MC10H101P MC10H101FN
Description Quad OR/NOR Gate Quad OR/NOR Gate
Maker Motorola ( NXP ) Motorola ( NXP )
package instruction PLASTIC, DIP-16 QCCJ, LDCC20,.4SQ
Reach Compliance Code unknow unknow
Other features STROBED OUTPUTS STROBED OUTPUTS
series 10H 10H
JESD-30 code R-PDIP-T16 S-PQCC-J20
JESD-609 code e0 e0
length 19.175 mm 8.9662 mm
Logic integrated circuit type OR/NOR GATE OR/NOR GATE
Number of functions 4 4
Number of entries 1 1
Number of terminals 16 20
Maximum operating temperature 75 °C 75 °C
Output characteristics OPEN-EMITTER OPEN-EMITTER
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code DIP QCCJ
Encapsulate equivalent code DIP16,.3 LDCC20,.4SQ
Package shape RECTANGULAR SQUARE
Package form IN-LINE CHIP CARRIER
Maximum supply current (ICC) 29 mA 29 mA
Prop。Delay @ Nom-Su 1.7 ns 1.7 ns
propagation delay (tpd) 1.6 ns 1.6 ns
Certification status Not Qualified Not Qualified
Schmitt trigger NO NO
Maximum seat height 4.44 mm 4.57 mm
surface mount NO YES
technology ECL ECL
Temperature level COMMERCIAL EXTENDED COMMERCIAL EXTENDED
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form THROUGH-HOLE J BEND
Terminal pitch 2.54 mm 1.27 mm
Terminal location DUAL QUAD
width 7.62 mm 8.9662 mm
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