K4T28163QO-HCF8T datasheet, PDF

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K4T28163QO-HCF8T: DescriptionDDR DRAM, 8MX16, 0.35ns, CMOS, PBGA84; Categorystorage storage; File Size976KB，42 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/; Environmental Compliance

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K4T28163QO-HCF8T Overview

DDR DRAM, 8MX16, 0.35ns, CMOS, PBGA84

K4T28163QO-HCF8T Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	SAMSUNG
package instruction	FBGA, BGA84,9X15,32
Reach Compliance Code	compliant
Maximum access time	0.35 ns
Maximum clock frequency (fCLK)	533 MHz
I/O type	COMMON
interleaved burst length	4,8
JESD-30 code	R-PBGA-B84
memory density	134217728 bit
Memory IC Type	DDR DRAM
memory width	16
Number of terminals	84
word count	8388608 words
character code	8000000
Maximum operating temperature	85 °C
Minimum operating temperature
organize	8MX16
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	FBGA
Encapsulate equivalent code	BGA84,9X15,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, FINE PITCH
power supply	1.8 V
Certification status	Not Qualified
refresh cycle	4096
Continuous burst length	4,8
Maximum standby current	0.008 A
Maximum slew rate	0.205 mA
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Base Number Matches	1

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Rev. 1.03, Jan. 2010

K4T28163QO

128Mb O-die DDR2 SDRAM

84FBGA with Lead-Free & Halogen-Free

(RoHS compliant)

datasheet

SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND

SPECIFICATIONS WITHOUT NOTICE.

Products and specifications discussed herein are for reference purposes only. All information discussed

herein is provided on an "AS IS" basis, without warranties of any kind.

This document and all information discussed herein remain the sole and exclusive property of Samsung

Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property

right is granted by one party to the other party under this document, by implication, estoppel or other-

wise.

Samsung products are not intended for use in life support, critical care, medical, safety equipment, or

similar applications where product failure could result in loss of life or personal or physical harm, or any

military or defense application, or any governmental procurement to which special terms or provisions

may apply.

For updates or additional information about Samsung products, contact your nearest Samsung office.

All brand names, trademarks and registered trademarks belong to their respective owners.

ⓒ

-1-

K4T28163QO

datasheet

Rev. 1.03

DDR2 SDRAM

Table Of Contents

128Mb O-die DDR2 SDRAM

1. Ordering Information ..................................................................................................................................................... 4

2. Key Features................................................................................................................................................................. 4

3. Package pinout/Mechanical Dimension & Addressing.................................................................................................. 5

3.1 x16 Package Pinout (Top view) : 84ball FBGA Package ........................................................................................ 5

3.2 FBGA Package Dimension (x16)............................................................................................................................. 6

4. Input/Output Functional Description.............................................................................................................................. 7

5. DDR2 SDRAM Addressing ........................................................................................................................................... 8

6. Absolute Maximum Ratings .......................................................................................................................................... 9

7. AC & DC Operating Conditions..................................................................................................................................... 9

7.1 Recommended DC operating Conditions (SSTL_1.8)............................................................................................. 9

7.2 Operating Temperature Condition ........................................................................................................................... 10

7.3 Input DC Logic Level ............................................................................................................................................... 10

7.4 Input AC Logic Level ............................................................................................................................................... 10

7.5 AC Input Test Conditions......................................................................................................................................... 10

7.6 Differential input AC logic Level............................................................................................................................... 11

7.7 Differential AC output parameters ........................................................................................................................... 11

8. ODT DC electrical characteristics ................................................................................................................................. 11

9. OCD default characteristics .......................................................................................................................................... 12

10. IDD Specification Parameters and Test Conditions .................................................................................................... 13

11. DDR2 SDRAM IDD Spec Table .................................................................................................................................. 15

12. Input/Output capacitance ............................................................................................................................................ 16

13. Electrical Characteristics & AC Timing for DDR2-1066/800/667 ................................................................................ 16

13.1 Refresh Parameters by Device Density................................................................................................................. 16

13.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin ................................................................ 16

13.3 Timing Parameters by Speed Grade ..................................................................................................................... 17

14. General notes, which may apply for all AC parameters .............................................................................................. 19

15. Specific Notes for dedicated AC parameters .............................................................................................................. 21

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Description	DDR DRAM, 8MX16, 0.35ns, CMOS, PBGA84	DDR DRAM, 8MX16, 0.4ns, CMOS, PBGA84	DDR DRAM, 8MX16, 0.35ns, CMOS, PBGA84	DDR DRAM, 8MX16, 0.45ns, CMOS, PBGA84	DDR DRAM, 8MX16, 0.4ns, CMOS, PBGA84	DDR DRAM, 8MX16, 0.4ns, CMOS, PBGA84	DDR DRAM, 8MX16, 0.4ns, CMOS, PBGA84	DDR DRAM, 8MX16, 0.35ns, CMOS, PBGA84
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to	conform to	conform to
Maker	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG
package instruction	FBGA, BGA84,9X15,32	FBGA, BGA84,9X15,32	FBGA, BGA84,9X15,32	FBGA, BGA84,9X15,32	FBGA, BGA84,9X15,32	FBGA, BGA84,9X15,32	FBGA, BGA84,9X15,32	FBGA, BGA84,9X15,32
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant
Maximum access time	0.35 ns	0.4 ns	0.35 ns	0.45 ns	0.4 ns	0.4 ns	0.4 ns	0.35 ns
Maximum clock frequency (fCLK)	533 MHz	400 MHz	533 MHz	333 MHz	400 MHz	400 MHz	400 MHz	533 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
interleaved burst length	4,8	4,8	4,8	4,8	4,8	4,8	4,8	4,8
JESD-30 code	R-PBGA-B84	R-PBGA-B84	R-PBGA-B84	R-PBGA-B84	R-PBGA-B84	R-PBGA-B84	R-PBGA-B84	R-PBGA-B84
memory density	134217728 bit	134217728 bit	134217728 bit	134217728 bit	134217728 bit	134217728 bit	134217728 bit	134217728 bit
Memory IC Type	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM
memory width	16	16	16	16	16	16	16	16
Number of terminals	84	84	84	84	84	84	84	84
word count	8388608 words	8388608 words	8388608 words	8388608 words	8388608 words	8388608 words	8388608 words	8388608 words
character code	8000000	8000000	8000000	8000000	8000000	8000000	8000000	8000000
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
organize	8MX16	8MX16	8MX16	8MX16	8MX16	8MX16	8MX16	8MX16
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	FBGA	FBGA	FBGA	FBGA	FBGA	FBGA	FBGA	FBGA
Encapsulate equivalent code	BGA84,9X15,32	BGA84,9X15,32	BGA84,9X15,32	BGA84,9X15,32	BGA84,9X15,32	BGA84,9X15,32	BGA84,9X15,32	BGA84,9X15,32
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH
power supply	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	4096	4096	4096	4096	4096	4096	4096	4096
Continuous burst length	4,8	4,8	4,8	4,8	4,8	4,8	4,8	4,8
Maximum standby current	0.008 A	0.008 A	0.008 A	0.008 A	0.008 A	0.008 A	0.008 A	0.008 A
Maximum slew rate	0.205 mA	0.2 mA	0.205 mA	0.185 mA	0.2 mA	0.2 mA	0.2 mA	0.205 mA
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	OTHER	OTHER	OTHER	OTHER	OTHER	OTHER	OTHER	OTHER
Terminal form	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL
Terminal pitch	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
Base Number Matches	1	1	1	1	1	1	1	1

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