5962R9671701TRX datasheet, PDF

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5962R9671701TRX: DescriptionACT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, CDIP20; Categorylogic logic; File Size50KB，3 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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5962R9671701TRX Overview

ACT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, CDIP20

5962R9671701TRX Parametric

Parameter Name	Attribute value
Maker	Renesas Electronics Corporation
package instruction	,
Reach Compliance Code	unknown
series	ACT
JESD-30 code	R-CDIP-T20
Logic integrated circuit type	BUS DRIVER
Number of digits	4
Number of functions	2
Number of ports	2
Number of terminals	20
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output characteristics	3-STATE
Output polarity	INVERTED
Package body material	CERAMIC, METAL-SEALED COFIRED
Package shape	RECTANGULAR
Package form	IN-LINE
propagation delay (tpd)	17.5 ns
Certification status	Not Qualified
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	THROUGH-HOLE
Terminal location	DUAL
total dose	100k Rad(Si) V
Base Number Matches	1

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ACTS240T

Data Sheet

July 1999

File Number

4610.1

High Reliability, Radiation Hardened Octal

Buffer/Line Driver, Three-State, Inverting

Intersil‘s Satellite Applications

(SAF) devices are

fully tested and guaranteed to 100kRAD total dose. These

QML Class T devices are processed to a standard ﬂow

intended to meet the cost and shorter lead-time needs of

large volume satellite manufacturers, while maintaining a

high level of reliability.

The Intersil ACTS240T is a Radiation Hardened High

Reliability, High-Speed CMOS/SOS Octal Buffer/Line Driver

with three-state outputs having two active low enable inputs.

Each enable input controls a set of four inverting buffer/line

drivers. A HIGH on the enable input places the outputs in a

high impedance state.

Flow

Features

• QML Class T, Per MIL-PRF-38535

• Radiation Performance

- Gamma Dose (γ) 1 x 10

RAD(Si)

- Latch-Up Free Under Any Conditions

- Single Event Upset (SEU) Immunity: <1 x 10

-10

Errors/Bit/Day (Typ)

- SEU LET Threshold . . . . . . . . . . . . .>100 MEV-cm

/mg

• 1.25 Micron Radiation Hardened SOS CMOS

• Signiﬁcant Power Reduction Compared to ALSTTL Logic

• DC Operating Voltage Range . . . . . . . . . . . . 4.5V to 5.5V

• Input Logic Levels

- V

= 0.8V Max

- V

= V

CC/2

Min

• Fast Propagation Delay . . . . . . . 17.5ns (Max), 12ns (Typ)

Speciﬁcations

Speciﬁcations for Rad Hard QML devices are controlled by

the Defense Supply Center in Columbus (DSCC). The SMD

numbers listed below must be used when ordering.

Detailed Electrical Speciﬁcations for the ACTS240T are

contained in SMD 5962-96717.

A “hot-link” is provided from

our website for downloading.

www.intersil.com/spacedefense/newsafclasst.asp

Intersil‘s Quality Management Plan (QM Plan), listing all

Class T screening operations, is also available on our

website.

www.intersil.com/quality/manuals.asp

Pinouts

ACTS240T (SBDIP), CDIP2-T20

TOP VIEW

AEN

AI1

BO4

AI2

BO3

AI3

BO2

20 V

19 BEN

18 AO1

17 BI4

16 AO2

15 BI3

14 AO3

13 BI2

12 AO4

11 BI1

Ordering Information

ORDERING

NUMBER

5962R9671701TRC

5962R9671701TXC

PART

NUMBER

ACTS240DTR

ACTS240KTR

TEMP.

RANGE

(

-55 to 125

AEN

AI1

BO4

AI2

BO3

AI3

BO2

AI4

BO1

GND

AI4

BO1

GND 10

ACTS240T (FLATPACK), CDFP4-F20

TOP VIEW

BEN

AO1

BI4

AO2

BI3

AO3

BI2

AO4

BI1

NOTE:

Minimum order quantity for -T is 150 units through

distribution, or 450 units direct.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

www.intersil.com or 407-727-9207

Intersil Corporation 1999

5962R9671701TRX Related Products

	5962R9671701TRX	5962R9671701TXX
Description	ACT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, CDIP20	ACT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, CDFP20
Maker	Renesas Electronics Corporation	Renesas Electronics Corporation
Reach Compliance Code	unknown	unknown
series	ACT	ACT
JESD-30 code	R-CDIP-T20	R-CDFP-F20
Logic integrated circuit type	BUS DRIVER	BUS DRIVER
Number of digits	4	4
Number of functions	2	2
Number of ports	2	2
Number of terminals	20	20
Maximum operating temperature	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C
Output characteristics	3-STATE	3-STATE
Output polarity	INVERTED	INVERTED
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
Package shape	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	FLATPACK
propagation delay (tpd)	17.5 ns	17.5 ns
Certification status	Not Qualified	Not Qualified
Maximum supply voltage (Vsup)	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V
surface mount	NO	YES
technology	CMOS	CMOS
Temperature level	MILITARY	MILITARY
Terminal form	THROUGH-HOLE	FLAT
Terminal location	DUAL	DUAL
total dose	100k Rad(Si) V	100k Rad(Si) V
Base Number Matches	1	1

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