Changes to Ordering Guide .......................................................... 15
4/09—Rev. 0 to Rev. A
Changes to Ordering Guide .......................................................... 15
10/04—Revision 0: Initial Version
Rev. F | Page 2 of 16
Data Sheet
SPECIFICATIONS
V
CC
= 5 V ± 5%, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
Parameter
DRIVER
Differential Output Voltage
Min
V
OD
2.0
1.5
1.5
Typ
Max
V
CC
5
5
5
0.2
3
0.2
−200
−200
+200
+200
Unit
V
V
V
V
V
V
V
mA
mA
ADM4850 to ADM4857
Test Conditions/Comments
R = ∞, see Figure 19
1
R = 50 Ω (RS-422), see Figure 19
R = 27 Ω (RS-485), see Figure 19
V
TST
= −7 V to +12 V, see Figure 20
R = 27 Ω or 50 Ω, see Figure 19
R = 27 Ω or 50 Ω, see Figure 19
R = 27 Ω or 50 Ω, see Figure 19
−7 V < V
OUT
< +12 V
Differential Output Voltage over Common-
Mode Range
Δ|V
OD
| for Complementary Output States
Common-Mode Output Voltage
Δ|V
OC
| for Complementary Output States
Output Short-Circuit Current
V
OUT
= High
V
OUT
= Low
DRIVER INPUT LOGIC
CMOS Input Logic Threshold
Low
High
CMOS Logic Input Current (DI)
DE Input Resistance to GND
RECEIVER
Differential Input Threshold Voltage
Input Hysteresis
Input Resistance (A, B)
Input Current (A, B)
CMOS Logic Input Current (RE)
CMOS Output Voltage
Low
High
Output Short-Circuit Current
Three-State Output Leakage Current
POWER SUPPLY CURRENT
115 kbps Options (ADM4850/ADM4854)
|V
OD3
|
V
OC
0.8
2.0
±1
220
V
TH
−200
96
−125
20
150
−30
V
V
µA
kΩ
mV
mV
kΩ
mA
mA
µA
V
V
mA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
−7 V < V
OC
< +12 V
−7 V < V
OC
< +12 V
−7 V < V
OC
< +12 V
V
IN
= 12 V
V
IN
= −7 V
0.125
−0.1
±1
0.4
4.0
7
85
±2
5
60
160
5
120
200
5
400
500
5
400
500
I
OUT
= 4 mA
I
OUT
= −4 mA
V
OUT
= GND or V
CC
0.4 V ≤ V
OUT
≤ 2.4 V
DE = 0 V, RE = V
CC
(shutdown)
DE = 0 V, RE = 0 V
DE = V
CC
DE = 0 V, RE = V
CC
(shutdown)
DE = 0 V, RE = 0 V
DE = V
CC
DE = 0 V, RE = V
CC
(shutdown)
DE = 0 V, RE = 0 V
DE = V
CC
DE = 0 V, RE = V
CC
(shutdown)
DE = 0 V, RE = 0 V
DE = V
CC
36
100
500 kbps Options (ADM4855)
80
120
2.5 Mbps Options (ADM4852/ADM4856)
250
320
10 Mbps Options (ADM4853/ADM4857)
250
320
1
Guaranteed by design.
Rev. F | Page 3 of 16
ADM4850 to ADM4857
ADM4850/ADM4854
TIMING SPECIFICATIONS
V
CC
= 5 V ± 5%, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 3.
Parameter
DRIVER
Maximum Data Rate
Propagation Delay
Skew
Rise/Fall Times
Enable Time
Disable Time
Enable Time from Shutdown
RECEIVER
Propagation Delay
Differential Skew
Enable Time
Disable Time
Enable Time from Shutdown
Time to Shutdown
1
Data Sheet
Symbol
Min
115
600
600
Typ
Max
Unit
kbps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Test Conditions/Comments
t
PLH
, t
PHL
t
SKEW
t
R
, t
F
t
ZH
, t
ZL
t
LZ
, t
HZ
2500
70
2400
2000
2000
4000
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, see Figure 21 and Figure 25
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, see Figure 21 and Figure 25
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, see Figure 21 and Figure 25
R
L
= 500 Ω, C
L
= 100 pF, see Figure 22 and Figure 27 (ADM4850 only)
R
L
= 500 Ω, C
L
= 15 pF, see Figure 22 and Figure 27 (ADM4850 only)
R
L
= 500 Ω, C
L
= 100 pF, see Figure 22 (ADM4850 only)
C
L
= 15 pF, see Figure 23 and Figure 26
C
L
= 15 pF, see Figure 23 and Figure 26
R
L
= 1 kΩ, C
L
= 15 pF, see Figure 24 and Figure 28 (ADM4850 only)
R
L
= 1 kΩ, C
L
= 15 pF, see Figure 24 and Figure 28 (ADM4850 only)
R
L
= 1 kΩ, C
L
= 15 pF, see Figure 24 (ADM4850 only)
ADM4850
only
1
t
PLH
, t
PHL
t
SKEW
t
ZH
, t
ZL
t
LZ
, t
HZ
400
5
20
4000
330
1000
255
50
50
3000
50
The half-duplex device is put into shutdown mode by driving RE high and DE low. If these inputs are in this state for less than 50 ns, the device is guaranteed not to
enter shutdown mode. If the enable inputs are in this state for at least 3000 ns, the device is guaranteed to enter shutdown mode.
ADM4851/ADM4855
TIMING SPECIFICATIONS
V
CC
= 5 V ± 5%, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 4.
Parameter
DRIVER
Maximum Data Rate
Propagation Delay
Skew
Rise/Fall Times
Enable Time
Disable Time
Enable Time from Shutdown
RECEIVER
Propagation Delay
Differential Skew
Enable Time
Disable Time
Enable Time from Shutdown
Time to Shutdown
1
Symbol
Min
500
250
200
Typ
Max
Unit
kbps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Test Conditions/Comments
t
PLH
, t
PHL
t
SKEW
t
R
, t
F
t
ZH
, t
ZL
t
LZ
, t
HZ
600
40
600
1000
1000
4000
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, see Figure 21 and Figure 25
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, see Figure 21 and Figure 25
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, see Figure 21 and Figure 25
R
L
= 500 Ω, C
L
= 100 pF, see Figure 22 and Figure 27 (ADM4851 only)
R
L
= 500 Ω, C
L
= 100 pF, see Figure 22 and Figure 27 (ADM4851 only)
R
L
= 500 Ω, C
L
= 100 pF, see Figure 22 (ADM4851 only)
C
L
= 15 pF, see Figure 23 and Figure 26
C
L
= 15 pF, see Figure 23 and Figure 26
R
L
= 1 kΩ, C
L
= 15 pF, see Figure 24 and Figure 28 (ADM4851 only)
R
L
= 1 kΩ, C
L
= 15 pF, see Figure 24 and Figure 28 (ADM4851 only)
R
L
= 1 kΩ, C
L
= 15 pF, see Figure 24 (ADM4851 only)
ADM4851
only
1
t
PLH
, t
PHL
t
SKEW
t
ZH
, t
ZL
t
LZ
, t
HZ
400
5
20
4000
330
1000
250
50
50
3000
50
The half-duplex device is put into shutdown mode by driving RE high and DE low. If these inputs are in this state for less than 50 ns, the device is guaranteed not to
enter shutdown mode. If the enable inputs are in this state for at least 3000 ns, the device is guaranteed to enter shutdown mode.
Rev. F | Page 4 of 16
Data Sheet
ADM4852/ADM4856
TIMING SPECIFICATIONS
V
CC
= 5 V ± 5%, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 5.
Parameter
DRIVER
Maximum Data Rate
Propagation Delay
Skew
Rise/Fall Times
Enable Time
Disable Time
Enable Time from Shutdown
RECEIVER
Propagation Delay
Differential Skew
Enable Time
Disable Time
Enable Time from Shutdown
Time to Shutdown
1
ADM4850 to ADM4857
Symbol
Min
2.5
50
Typ
Max
Unit
Mbps
ns
ns
ns
ns
ns
ns
Test Conditions/Comments
t
PLH
, t
PHL
t
SKEW
t
R
, t
F
t
ZH
, t
ZL
t
LZ
, t
HZ
180
50
140
180
180
4000
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, see Figure 21 and Figure 25
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, see Figure 21 and Figure 25
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, see Figure 21 and Figure 25
R
L
= 500 Ω, C
L
= 100 pF, see Figure 22 and Figure 27 (ADM4852
only)
R
L
= 500 Ω, C
L
= 100 pF, see Figure 22 and Figure 27 (ADM4852
only)
R
L
= 500 Ω, C
L
= 100 pF, see Figure 22 (ADM4852 only)
C
L
= 15 pF, see Figure 23 and Figure 26
C
L
= 15 pF, see Figure 23 and Figure 26
R
L
= 1 kΩ, C
L
= 15 pF, see Figure 24 and Figure 28 (ADM4852 only)
R
L
= 1 kΩ, C
L
= 15 pF, see Figure 24 and Figure 28 (ADM4852 only)
R
L
= 1 kΩ, C
L
= 15 pF, see Figure 24 (ADM4852 only)
ADM4852
only
1
t
PLH
, t
PHL
t
SKEW
t
ZH
, t
ZL
t
LZ
, t
HZ
55
5
20
4000
330
190
50
50
50
3000
50
ns
ns
ns
ns
ns
ns
The half-duplex device is put into shutdown mode by driving RE high and DE low. If these inputs are in this state for less than 50 ns, the device is guaranteed not to
enter shutdown mode. If the enable inputs are in this state for at least 3000 ns, the device is guaranteed to enter shutdown mode.
ADM4853/ADM4857
TIMING SPECIFICATIONS
V
CC
= 5 V ± 5%, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 6.
Parameter
DRIVER
Maximum Data Rate
Propagation Delay
Skew
Rise/Fall Times
Enable Time
Disable Time
Enable Time from Shutdown
RECEIVER
Propagation Delay
Differential Skew
Enable Time
Disable Time
Enable Time from Shutdown
Time to Shutdown
1
Symbol
Min
10
0
Typ
Max
Unit
Mbps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Test Conditions/Comments
t
PLH
, t
PHL
t
SKEW
t
R
, t
F
t
ZH
, t
ZL
t
LZ
, t
HZ
30
10
30
35
35
4000
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, see Figure 21 and Figure 25
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, see Figure 21 and Figure 25
R
LDIFF
= 54 Ω, C
L1
= C
L2
= 100 pF, see Figure 21 and Figure 25
R
L
= 500 Ω, C
L
= 100 pF, see Figure 22 and Figure 27 (ADM4853 only)
R
L
= 500 Ω, C
L
= 100 pF, see Figure 22 and Figure 27 (ADM4853 only)
R
L
= 500 Ω, C
L
= 100 pF, see Figure 22 (ADM4853 only)
C
L
= 15 pF, see Figure 23 and Figure 26
C
L
= 15 pF, see Figure 23 and Figure 26
R
L
= 1 kΩ, C
L
= 15 pF, see Figure 24 and Figure 28 (ADM4853 only)
R
L
= 1 kΩ, C
L
= 15 pF, see Figure 24 and Figure 28 (ADM4853 only)
R
L
= 1 kΩ, C
L
= 15 pF, see Figure 24 (ADM4853 only)
ADM4853
only
1
t
PLH
, t
PHL
t
SKEW
t
ZH
, t
ZL
t
LZ
, t
HZ
55
5
20
4000
330
190
30
50
50
3000
50
The half-duplex device is put into shutdown mode by driving RE high and DE low. If these inputs are in this state for less than 50 ns, the device is guaranteed not to
enter shutdown mode. If the enable inputs are in this state for at least 3000 ns, the device is guaranteed to enter shutdown mode.
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