3LP49CH-18-FREQ3-PN datasheet, PDF

3LP49CH-18-FREQ3-PN: DescriptionQUARTZ CRYSTAL RESONATOR, 8 MHz - 11.999 MHz; CategoryPassive components Crystal/resonator; File Size708KB，1 Pages; ManufacturerPletronics; Environmental Compliance

Download Datasheet Parametric View All

3LP49CH-18-FREQ3-PN Overview

QUARTZ CRYSTAL RESONATOR, 8 MHz - 11.999 MHz

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Pletronics
Reach Compliance Code	unknown
Other features	AT CUT CRYSTAL
Ageing	5 PPM/YEAR
Crystal/Resonator Type	PARALLEL - FUNDAMENTAL
Drive level	50 µW
frequency stability	0.003%
frequency tolerance	15 ppm
load capacitance	18 pF
Manufacturer's serial number	LP
Installation features	THROUGH HOLE MOUNT
Maximum operating frequency	11.999 MHz
Minimum operating frequency	8 MHz
Maximum operating temperature	70 °C
Minimum operating temperature	-20 °C
physical size	L10.8XB4.47XH3.56 (mm)/L0.425XB0.176XH0.14 (inch)
Series resistance	70 Ω
surface mount	NO
Terminal surface	NOT SPECIFIED
Base Number Matches	1

≥

How to get accurate ADC sampling when PWM triggers ADC in motor control: In TI's official routine, ADC sampling sends out ADC conversion signal when the PWM1 time base counter counts equal to zero, triggering ADC to perform AD conversion. PWM time base count uses double-si...; swordman Microcontroller MCU

Complain about network cameras: [align=center].Nowadays, many people are at a loss as to how to buy network cameras. After all, they don't come into contact with such things in daily life, and when they really need them, they don't ...; wzq06633278902 Industrial Control Electronics

How to send specific data from PC to serial port and then control the operation of single chip?: I came up with an idea to use a temporary array temp to store the value in U0RXBUF, and then call the strcmp function for comparison. But the problem is that temp is an array of uncertain size, so cal...; zbnzbnzbnz Microcontroller MCU

How to Eliminate Competitive Risk Taking: module compare(out,a,b);input [7:0] a,b;output out;reg out;always @(a or b)begin if(ab)out=1; elseout=0;endendmoduleWhen performing gate-level simulation, glitches appear in the waveform, which is the...; 超自然 FPGA/CPLD

Fully custom ALU module design: Design a 32-bit ALU module using a full-custom method in a 0.13um process, then perform delay analysis and optimization on the circuit diagram based on Hspice; use a modular design method to complete ...; CauserBait FPGA/CPLD

Why can't the clock interrupt enter?: I am using a jxarm9 2410 board. The experimental environment is ADT. The interrupt request is done and the interrupt enable is done. Normally, the tick interrupt should be automatically triggered once...; lnb19850110 Embedded System

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components