3D7324D-5000 datasheet, PDF - EEWORLD Datasheet

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3D7324D-5000: DescriptionActive Delay Line, 1-Func, 4-Tap, True Output, CMOS, PDSO14, 0.150 INCH, ROHS COMPLIANT, SOIC-14; Categorylogic logic; File Size253KB，4 Pages; ManufacturerData Delay Devices; Environmental Compliance

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3D7324D-5000 Overview

Active Delay Line, 1-Func, 4-Tap, True Output, CMOS, PDSO14, 0.150 INCH, ROHS COMPLIANT, SOIC-14

3D7324D-5000 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	SOIC
package instruction	0.150 INCH, ROHS COMPLIANT, SOIC-14
Contacts	14
Reach Compliance Code	compliant
series	7324
Input frequency maximum value (fmax)	0.07 MHz
JESD-30 code	R-PDSO-G14
length	8.695 mm
Logic integrated circuit type	ACTIVE DELAY LINE
Number of functions	1
Number of taps/steps	4
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
programmable delay line	NO
Certification status	Not Qualified
Maximum seat height	1.82 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Total delay nominal (td)	5000 ns
width	3.9 mm
Base Number Matches	1

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3D7324

MONOLITHIC QUADRUPLE

FIXED DELAY LINE

(SERIES 3D7324)

FEATURES

•

All-silicon, low-power CMOS technology

TTL/CMOS compatible inputs and outputs

Vapor phase, IR and wave solderable

Low ground bounce noise

Leading- and trailing-edge accuracy

Delay range:

6 through 6000ns

Delay tolerance:

2% or 1.0ns

Temperature stability:

±3%

typ (-40C to 85C)

Vdd stability:

±1%

typical (4.75V to 5.25V)

Minimum input pulse width:

20% of total delay

PACKAGES

N/C

GND

VDD

N/C

3D7324D-xx

SOIC (150 Mil)

For mechanical dimensions, click

here

For package marking details, click

here

FUNCTIONAL DESCRIPTION

The 3D7324 Quadruple Delay Line product family consists of fixed-

delay CMOS integrated circuits. Each package contains four matched,

independent delay lines. Delay values can range from 6ns through

6000ns. The input is reproduced at the output without inversion,

shifted in time as per the user-specified dash number. The 3D7324 is

TTL- and CMOS-compatible, capable of driving ten 74LS-type loads,

and features both rising- and falling-edge accuracy.

The all-CMOS 3D7324 integrated circuit has been designed as a

reliable, economic alternative to hybrid TTL fixed delay lines. It is

offered in a space saving surface mount 14-pin SOIC.

PIN DESCRIPTIONS

VDD

GND

N/C

Delay Line 1 Input

Delay Line 2 Input

Delay Line 3 Input

Delay Line 4 Input

Delay Line 1 Output

Delay Line 2 Output

Delay Line 3 Output

Delay Line 4 Output

+5 Volts

Ground

No Connection

TABLE 1: PART NUMBER SPECIFICATIONS

PART NUMBER

DELAY

PER LINE

(ns)

1.0

100

2.0

200

4.0

500

10.0

1000

2000

5000

100

6000

120

Max Operating

Frequency

55.5 MHz

41.6 MHz

33.3 MHz

22.2 MHz

16.7 MHz

13.3 MHz

11.1 MHz

8.33 MHz

6.67 MHz

3.33 MHz

1.67 MHz

0.67 MHz

0.33 MHz

0.17 MHz

0.07 MHz

0.05 MHz

INPUT RESTRICTIONS

Absolute Max

Min Operating

Oper. Freq.

Pulse Width

125.0 MHz

9.0 ns

111.0 MHz

12.0 ns

100.0 MHz

15.0 ns

100.0 MHz

22.5 ns

100.0 MHz

30.0 ns

83.3 MHz

37.5 ns

71.4 MHz

45.0 ns

62.5 MHz

60.0 ns

50.0 MHz

75.0 ns

25.0 MHz

150.0 ns

12.5 MHz

300.0 ns

5.00 MHz

750.0 ns

2.50 MHz

1500.0 ns

1.25 MHz

3000.0 ns

0.50 MHz

7500.0 ns

0.42 MHz

9000.0 ns

Absolute Min

Oper. P.W.

4.0 ns

4.5 ns

5.0 ns

6.0 ns

7.0 ns

8.0 ns

10.0 ns

20.0 ns

40.0 ns

100.0 ns

200.0 ns

400.0 ns

1000.0 ns

1200.0 ns

3D7324D-6

3D7324D-8

3D7324D-10

3D7324D-15

3D7324D-20

3D7324D-25

3D7324D-30

3D7324D-40

3D7324D-50

3D7324D-100

3D7324D-200

3D7324D-500

3D7324D-1000

3D7324D-2000

3D7324D-5000

3D7324D-6000

NOTE: Any delay between 10 and 6000 ns not shown is also available.

2007

Data Delay Devices

Doc #06016

6/25/2007

DATA DELAY DEVICES, INC.

3 Mt. Prospect Ave. Clifton, NJ 07013

3D7324D-5000 Related Products

	3D7324D-5000	3D7324D-2000
Description	Active Delay Line, 1-Func, 4-Tap, True Output, CMOS, PDSO14, 0.150 INCH, ROHS COMPLIANT, SOIC-14	Active Delay Line, 1-Func, 4-Tap, True Output, CMOS, PDSO14, 0.150 INCH, ROHS COMPLIANT, SOIC-14
Is it lead-free?	Lead free	Lead free
Is it Rohs certified?	conform to	conform to
Parts packaging code	SOIC	SOIC
package instruction	0.150 INCH, ROHS COMPLIANT, SOIC-14	0.150 INCH, ROHS COMPLIANT, SOIC-14
Contacts	14	14
Reach Compliance Code	compliant	compliant
series	7324	7324
Input frequency maximum value (fmax)	0.07 MHz	0.17 MHz
JESD-30 code	R-PDSO-G14	R-PDSO-G14
length	8.695 mm	8.695 mm
Logic integrated circuit type	ACTIVE DELAY LINE	ACTIVE DELAY LINE
Number of functions	1	1
Number of taps/steps	4	4
Number of terminals	14	14
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Output polarity	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED
programmable delay line	NO	NO
Certification status	Not Qualified	Not Qualified
Maximum seat height	1.82 mm	1.82 mm
Maximum supply voltage (Vsup)	5.25 V	5.25 V
Minimum supply voltage (Vsup)	4.75 V	4.75 V
Nominal supply voltage (Vsup)	5 V	5 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal form	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
Total delay nominal (td)	5000 ns	2000 ns
width	3.9 mm	3.9 mm
Base Number Matches	1	1

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