5962-9314302MZA datasheet, PDF

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5962-9314302MZA: DescriptionMicroprocessor, 32-Bit, 33MHz, CMOS, CQFP196, CERAMIC,LCC-196; CategoryThe embedded processor and controller Microcontrollers and processors; File Size297KB，35 Pages; Manufacturere2v technologies

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5962-9314302MZA Overview

Microprocessor, 32-Bit, 33MHz, CMOS, CQFP196, CERAMIC,LCC-196

5962-9314302MZA Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	QFP
package instruction	QFP, QFP196,1.5SQ
Contacts	196
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Address bus width	32
bit size	32
boundary scan	YES
maximum clock frequency	33 MHz
External data bus width	32
Format	FLOATING POINT
Integrated cache	YES
JESD-30 code	S-CQFP-G196
JESD-609 code	e0
length	33.905 mm
low power mode	NO
Number of terminals	196
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QFP
Encapsulate equivalent code	QFP196,1.5SQ
Package shape	SQUARE
Package form	FLATPACK
power supply	5 V
Certification status	Qualified
Filter level	MIL-STD-883
Maximum seat height	4.19 mm
speed	33 MHz
Maximum slew rate	1470 mA
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	QUAD
width	33.905 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR
Base Number Matches	1

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REVISIONS

LTR

DESCRIPTION

Changes in accordance with NOR 5962-R366-97

Changes in accordance with NOR 5962-R112-98

Update boilerplate to MIL-PRF-38535 requirements. - CFS

DATE (YR-MO-DA)

97-06-25

98-05-22

05-10-17

APPROVED

Monica L. Poelking

Thomas M. Hess

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

PMIC N/A

REV

SHEET

PREPARED

Thomas M. Hess

STANDARD

MICROCIRCUIT

DRAWING

THIS DRAWING IS AVAILABLE

FOR USE BY ALL

DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

CHECKED BY

Thomas M. Hess

APPROVED BY

Monica L. Poelking

DRAWING APPROVAL DATE

96-07-11

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

http://www.dscc.dla.mil

MICROCIRCUIT, DIGITAL, 32-BIT

MICROPROCESSOR, MONOLITHIC SILICON

AMSC N/A

REVISION LEVEL

SIZE

CAGE CODE

67268

1 OF

5962-93143

DSCC FORM 2233

APR 97

SHEET

5962-E434-05

2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein.

Unless otherwise specified, the issues of these documents are those cited in the solicitation.

INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS (IEEE)

IEEE Standard 1149.1 - IEEE Standard Test Access Port and Boundary Scan Architecture.

(Copies of these documents are available from the Institute of Electrical and Electronics Engineers, 445 Hoes Lane,

Piscataway, NJ 08854-4150.)

2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of

this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a

specific exemption has been obtained.

3. REQUIREMENTS

3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with

MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The

modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for

device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified

herein.

3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in

MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.

3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1.

3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.

3.2.3 Block diagram. The block diagram shall be as specified on figure 3.

3.2.4 Switching test circuit and waveforms. The switching test circuit and waveforms shall be as specified on figure 4.

3.2.5 Boundary scan instruction codes. The boundary scan instruction codes shall be as specified on figure 5.

3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the

electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full

case operating temperature range.

3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical

tests for each subgroup are defined in table I.

3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be

marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer

has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be

marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be

in accordance with MIL-PRF-38535, appendix A.

3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in

MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.

3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535

listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of

compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see

6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this

drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and

herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.

STANDARD

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-93143

SHEET

5962-9314302MZA Related Products

	5962-9314302MZA	5962-9314302MYC	5962-9314302MZC	5962-9314302MXC	5962-9314301MYC
Description	Microprocessor, 32-Bit, 33MHz, CMOS, CQFP196, CERAMIC,LCC-196	Microprocessor, 32-Bit, 33MHz, CMOS, LCC-196	Microprocessor, 32-Bit, 33MHz, CMOS, CQFP196, CERAMIC,LCC-196	Microprocessor, 32-Bit, 33MHz, CMOS, CPGA179, CERAMIC, PGA-179	Microprocessor, 32-Bit, 25MHz, CMOS, LCC-196
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	QFP	QFP	QFP	PGA	QFP
package instruction	QFP, QFP196,1.5SQ	QFF, TPAK196,2.5SQ,25	QFP, QFP196,1.5SQ	PGA, PGA179,18X18	LCC-196
Contacts	196	196	196	179	196
Reach Compliance Code	unknown	unknow	unknow	unknown	unknown
ECCN code	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C
Address bus width	32	32	32	32	32
bit size	32	32	32	32	32
boundary scan	YES	YES	YES	YES	YES
maximum clock frequency	33 MHz	33 MHz	33 MHz	33 MHz	25 MHz
External data bus width	32	32	32	32	32
Format	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT
Integrated cache	YES	YES	YES	YES	YES
JESD-30 code	S-CQFP-G196	S-XQFP-F196	S-CQFP-G196	S-CPGA-P179	S-XQFP-F196
JESD-609 code	e0	e4	e4	e4	e4
low power mode	NO	NO	NO	NO	NO
Number of terminals	196	196	196	179	196
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED	UNSPECIFIED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	UNSPECIFIED
encapsulated code	QFP	QFF	QFP	PGA	QFF
Encapsulate equivalent code	QFP196,1.5SQ	TPAK196,2.5SQ,25	QFP196,1.5SQ	PGA179,18X18	TPAK196,2.5SQ,25
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	FLATPACK	FLATPACK	FLATPACK	GRID ARRAY	FLATPACK
power supply	5 V	5 V	5 V	5 V	5 V
Certification status	Qualified	Qualified	Qualified	Qualified	Qualified
Filter level	MIL-STD-883	MIL-STD-883	MIL-STD-883	MIL-STD-883	MIL-STD-883
speed	33 MHz	33 MHz	33 MHz	33 MHz	25 MHz
Maximum slew rate	1470 mA	1470 mA	1470 mA	1470 mA	1470 mA
Maximum supply voltage	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V
Minimum supply voltage	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	NO	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY
Terminal surface	TIN LEAD	GOLD	GOLD	GOLD	GOLD
Terminal form	GULL WING	FLAT	GULL WING	PIN/PEG	FLAT
Terminal pitch	0.635 mm	0.635 mm	0.635 mm	2.54 mm	0.635 mm
Terminal location	QUAD	QUAD	QUAD	PERPENDICULAR	QUAD
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR	MICROPROCESSOR	MICROPROCESSOR	MICROPROCESSOR	MICROPROCESSOR
Base Number Matches	1	1	1	1	1
length	33.905 mm	33.91 mm	33.905 mm	-	33.91 mm
Maximum seat height	4.19 mm	3.302 mm	4.19 mm	-	3.302 mm
width	33.905 mm	33.91 mm	33.905 mm	-	33.91 mm

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