EEWORLDEEWORLDEEWORLD

Part Number

Search

VEMV38GT33-128.0-2.0/-40+85

Description
HCMOS Output Clock Oscillator, 128MHz Nom, ROHS COMPLIANT, DIL-14/4
CategoryPassive components    oscillator   
File Size342KB,1 Pages
ManufacturerEuroquartz
Websitehttp://www.euroquartz.co.uk/
Environmental Compliance
Download Datasheet Parametric View All

VEMV38GT33-128.0-2.0/-40+85 Overview

HCMOS Output Clock Oscillator, 128MHz Nom, ROHS COMPLIANT, DIL-14/4

VEMV38GT33-128.0-2.0/-40+85 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerEuroquartz
Reach Compliance Codecompliant
Ageing1 PPM/FIRST YEAR
Maximum control voltage2.5 V
Minimum control voltage0.5 V
maximum descent time10 ns
Frequency Adjustment - MechanicalYES
Frequency offset/pull rate6 ppm
frequency stability2%
Installation featuresTHROUGH HOLE MOUNT
Nominal operating frequency128 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeHCMOS
Output load15 pF
physical size18.4mm x 11.7mm x 7.3mm
longest rise time10 ns
Nominal supply voltage3.3 V
surface mountNO
maximum symmetry60/40 %
Base Number Matches1
EURO
QUARTZ
14 pin DIL compatible package
Wide frequency range: 27.0MHz to 200.0MHz
Supply voltage 3.3 Volts
Frequency stability from ±1ppm over -30 to +75°C
RoHS compliant
EMV38GT Series TCXO
HCMOS 14 pin DIL compatible, 'V' Group
EMV38GT - OUTLINES AND DIMENSIONS
DESCRIPTION
EMV38GT series TCXOs are packaged in a 14 pin DIL compatible
package. With squarewave (CMOS) output, tolerances are available
from ±1.0ppm over -30° to +75°C. The part has a 0.01mF decoupling
capacitor built in.
SPECIFICATION
Product Series Code
TCXO:
VCTCXO:
Frequency Range:
Output Waveform:
Initial Calibration Tolerance
Models without trimmer:
Models with trimmer:
Standard Frequencies:
EMV38GT
VEMV38GT
27.0MHz to 200.0MHz
Squarewave, HCMOS
<±2.0ppm
<±1.0ppm
30.0, 32.768, 38.880, 40.0,
50.0, 54.0, 64.0, 65.536,
77.76, 80.0, 128.0, 160.0
and 200.0MHz
(Partial
list)
See table
±3.0ppm minimum
±1.0 ppm max. first year
±0.3 ppm max. ±5% change
±0.3 ppm max. ±10% change
±1.0ppm max. for one reflow
(Measured
after 24 hours)
+3.3 Volts
Logic High: 90% Vdd min.
Logic Low: 10% Vdd max.
40mA maximum
10ns typical
50%±10% standard,
5ms typical, 10ms max.
See table below
15pF
-55~+125°C
Operating Temperature Range:
Mechanical Frequency Tuning:
Frequency Stability
vs. Ageing:
vs. Voltage Change:
vs. Load Change:
vs. Reflow (SMD type):
Supply Voltage:
Output Logic Levels:
Current Consumption:
Rise and Fall Times:
Duty Cycle:
Start-up Time:
Current Consumption:
Output Load:
Storage Temperature:
VEMV38GT VOLTAGE CONTROL SPECIFICATION
Standard = +1.5±1.0Volts for all input
voltages.
(Contact technical sales if
+2.5±2.0 Volts is required.)
Frequency Deviation: ±6.0 ppm min. (Vcon = +4.5V±1.0V)
Slope Polarity:
Positive
(increase of control voltage increases
output frequency.)
Input Impedance:
2M minimum
Modulation Bandwidth: 25kHz minimum
Linearity:
±10% maximum
Control Voltage:
SSB PHASE NOISE at 25°C
FREQUENCY STABILITY
Stability (ppm)
0 ~ +50
-10 ~ +60
Temp.
Range (°C)
-20 ~ +70
-30 ~ +75
-40 ~ +85
P
±0.5
P
ASK
X
X
X
±1.0
P
P
P
P
X
±1.5
P
P
P
P
X
±2.0
P
P
P
P
ASK
±2.5
P
P
P
P
ASK
±3.0
P
P
P
P
P
Part =
EMV38GT33
Offset
at 77.760Mhz
(dBc/Hz)
at 155.520Mhz
(dBc/Hz)
10Hz
-80
-80
100Hz
-110
-110
1kHz
-135
-125
10kHz
-130
-120
100kHz
-132
-125
PART NUMBERING SCHEDULE
Example:
EMV38GT33-200.00-2.5/-30+75
= available, x = not available, ASK = call Technical Sales
Series Description
TCXO = EMV38GT*
VCTCXO = VEMV38GT
Supply Voltage
33 = 3.3 VDC
Frequency (MHz)
Stability over OTR (±ppm)
Operating Temperature Range (OTR) (°C)
Lower and upper limits
* Note, 'G' indicates RoHS Compliant part
EUROQUARTZ LIMITED Blacknell Lane CREWKERNE Somerset UK TA18 7HE
Tel: +44 (0)1460 230000 Fax: +44 (0)1460 230001 info@euroquartz.co.uk
www.euroquartz.co.uk
The upper limit for each mobile phone is US$2.5. How much 5G patent fees can Huawei collect?
On March 16, Huawei released the "Huawei Innovation and Intellectual Property White Paper 2020" in Shenzhen, launched the Huawei Patent Digital Wall, and announced its 5G patent licensing rate standar...
eric_wang Talking
How does FPGA prevent theft?
What are some tricks for FPGA encryption? Ask an expert!...
eeleader FPGA/CPLD
WNS TNS problem in Vivado
I would like to ask about WNS and TNS in Vivado. Why does the report after my design generates the bitstream show that WNS is less than 0, but the function is still correct after downloading the board...
成谶 FPGA/CPLD
Fabrication of a proportional frequency discriminator
I changed the phase discriminator to the proportional discriminator directly, and the parameters did not change. Why is the output not the modulation signal but the carrier signal? Thank you...
ckx提问 Analog electronics
Schematic diagram of one-input and eight-output terminal block
How to draw the schematic diagram of kf235-5.0 spring type pcb terminal...
LmhSzn1314 PCB Design
Common Fallacies (1)—What are we worried about?
1. Overview Perhaps you've thought about wireless networking before, but the things you've heard have given you pause. Your coworkers tell you that wireless is complex and expensive. Your boss mention...
小瑞 RF/Wirelessly

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2082  711  2252  1562  2456  42  15  46  32  50 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号