Philips Semiconductors
Product specification
Octal transceiver with parity generator/checker
(3-State)
74ABT657
FEATURES
•
Combinational functions in one package
•
Low static and dynamic power dissipation with high speed and
•
Output capability: +64mA/–32mA
•
Power-up 3-State
•
Latch-up protection exceeds 500mA per Jedec Std 17
•
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
high output drive
DESCRIPTION
The 74ABT657 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT657 is an octal transceiver featuring non-inverting buffers
with 3-State outputs and an 8-bit parity generator/checker, and is
intended for bus-oriented applications. The buffers have a
guaranteed current sinking capability of 64mA. The
Transmit/Receive (T/R) input determines the direction of the data
flow through the bidirectional transceivers. Transmit (active-High)
enables data from A ports to B ports; Receive (active-Low) enables
data from B ports to A ports.
The Output Enable (OE) input disables both the A and B ports by
placing them in a high impedance condition when the OE input is
High. The parity select (ODD/EVEN) input gives the user the option
of odd or even parity systems. The parity (PARITY) pin is an output
from the generator/checker when transmitting from the port A to B
(T/R = High) and an input when receiving from port B to A port (T/R
= Low). When transmitting (T/R = High) the parity select
(ODD/EVEN) input is set, then the A port data is polled to determine
the number of High bits. The parity (PARITY) output then goes to the
logic state determined by the parity select (ODD/EVEN) setting and
by the number of High bits on port A. For example, if the parity
select (ODD/EVEN) is set Low (even parity), and the number of
High bits on port A is odd, then the parity (PARITY) output will be
High, transmitting even parity. If the number of High bits on port A is
even, then the parity (PARITY) output will be Low, keeping even
parity. When in receive mode (T/R = Low) the B port is polled to
determine the number of High bits. If parity select (ODD/EVEN) is
Low (even parity) and the number of Highs on port B is:
(1) odd and the parity (PARITY) input is High, then ERROR will be
High, signifying no error.
(2) even and the parity (PARITY) input is High, then ERROR will be
asserted Low, indicating an error.
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
I/O
I
CCZ
PARAMETER
Propagation delay
An to Bn or Bn to An
Input capacitance
I/O capacitance
Total supply current
CONDITIONS
T
amb
= 25°C; GND = 0V
C
L
= 50pF; V
CC
= 5V
V
I
= 0V or V
CC
Outputs disabled;
V
O
= 0V or V
CC
Outputs disabled; V
CC
=5.5V
TYPICAL
3.3
4
7
500
UNIT
ns
pF
pF
nA
ORDERING INFORMATION
PACKAGES
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT657 N
74ABT657 D
74ABT657 DB
74ABT657 PW
NORTH AMERICA
74ABT657 N
74ABT657 D
74ABT657 DB
74ABT657PW DH
DWG NUMBER
SOT222-1
SOT137-1
SOT340-1
SOT355-1
PIN CONFIGURATION
T/R
1
24 OE
23 B0
22 B1
21 B2
20 B3
19 GND
TOP VIEW
18 GND
17 B4
16 B5
15 B6
14 B7
13 PARITY
PIN DESCRIPTION
SYMBOL
13
11
12
1
2, 3, 4, 5,
6, 8, 9, 10
23, 22, 21, 20,
17, 16, 15, 14
24
18, 19
7
PIN NUMBER
PARITY
ODD/EVEN
ERROR
T/R
A0 - A7
B0 - B7
OE
GND
V
CC
NAME AND FUNCTION
Parity output
Parity select input
Error output
Transmit/receive input
A port 3-State outputs
B port 3-State outputs
Output enable input (active-Low)
Ground (0V)
Positive supply voltage
A0 2
A1 3
A2 4
A3 5
A4 6
V
CC
7
A5 8
A6 9
A7 10
ODD/EVEN 11
ERROR 12
SA00181
1995 Dec 11
2
853–1615 16106
Philips Semiconductors
Product specification
Octal transceiver with parity generator/checker
(3-State)
74ABT657
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
DC output current
Storage temperature range
V
O
< 0
output in Off or High state
output in Low state
V
I
< 0
CONDITIONS
RATING
–0.5 to +7.0
–18
–1.2 to +7.0
–50
–0.5 to +5.5
128
–65 to 150
UNIT
V
mA
V
mA
V
mA
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
∆t/∆v
T
amb
DC supply voltage
Input voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature range
0
–40
PARAMETER
Min
4.5
0
2.0
0.8
–32
64
5
+85
Max
5.5
V
CC
V
V
V
V
mA
mA
ns/V
°C
UNIT
1995 Dec 11
5
RF/Wirelessly
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