54ACT161DM-MLS datasheet, PDF - EEWORLD Datasheet

54ACT161DM-MLS: DescriptionACT SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, CDIP16, CERAMIC, DIP-16; Categorylogic logic; File Size181KB，12 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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54ACT161DM-MLS Overview

ACT SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, CDIP16, CERAMIC, DIP-16

Parameter Name	Attribute value
package instruction	DIP,
Reach Compliance Code	unknown
Counting direction	UP
series	ACT
JESD-30 code	R-GDIP-T16
length	19.43 mm
Load/preset input	YES
Logic integrated circuit type	BINARY COUNTER
Operating mode	SYNCHRONOUS
Number of digits	4
Number of functions	1
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
propagation delay (tpd)	10.5 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Trigger type	POSITIVE EDGE
width	7.62 mm
minfmax	85 MHz
Base Number Matches	1

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