CXP921064A
CMOS 16-bit Single Chip Microcomputer
Description
The CXP921064A is a CMOS 16-bit microcomputer
integrating on a single chip an A/D converter, serial
interface, I
2
C bus interface, timer, real-time pulse
generator, clock prescaler, remote control receive
circuit, and as well as basic configurations like a 16-
bit CPU, ROM, RAM, and I/O port.
This LSI also provides the sleep/stop functions that
enable lower power consumption.
100 pin QFP (Plastic)
100 pin LQFP (Plastic)
104 pin LFLGA (Plastic)
Features
•
An efficient instruction set as a controller
— Direct addressing, numerous abbreviated forms,
multiplication and division instructions
•
Instruction sets for C language and RTOS
— Highly quadratic instruction system, general-
purpose register of eigth 16-bit
×
16-bank
configuration
•
Minimum instruction cycle
100ns at 20MHz operation (2.7 to 3.3V)
61µs at 32kMHz operation (2.2 to 3.3V)
•
Incorporated ROM capacity 256K bytes
•
Incorporated RAM capacity 10K bytes
•
Peripheral functions
— A/D converter
8-bit 12 analog input, 2 channels successive approximation system,
automatic scanning function, (Conversion time: 3.4µs at 20MHz)
— Serial interface
128 -byte buffer RAM, 3 channels
8-stage FIFO, 1 channel (supports special mode master/slave)
— I
2
C bus interface
64-byte buffer RAM , 2 channels
(supports master/slave and automatic transfer mode)
— Timers
8-bit timer/counter, 2 channels (with timing output)
16-bit timer, 3 channels
— Real-time pulse generator
5-bit output, 1 channel (2-stage FIFO)
— Clock prescaler
— Remote control receive circuit 8-bit pulse measurement counter, 8-stage FIFO
•
Interruption
30 factors, 30 vectors, multi-interruption and priority selection possible
•
Standby mode
Sleep/stop
•
Package
100-pin plastic QFP/LQFP
104-pin plastic LFLGA
•
Piggy/evaluation chip
CXP921000A
•
FLASH EEPROM incorporated version CXP921F064A
Structure
Silicon gate CMOS IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E99707D33
CXP921064A
Pin Assignment 1
(Top View) 100-pin QFP package
PJ7/AN11/KS15
PJ6/AN10/KS14
PJ5/AN9/KS13
PJ4/AN8/KS12
PJ3/AN7/KS11
PJ2/AN6/KS10
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
PJ1/AN5/KS9
PB1/AN21
PB0/AN20
PA7/AN19
PA6/AN18
PA5/AN17
PA4/AN16
PA3/AN15
PA2/AN14
PA1/AN13
PA0/AN12
V
DD
V
SS
NC
PB2/AN22
PB3/AN23
PB4/SI3
PB5/SO3
PB6/SCK3
PB7/RMC
PC0/SDA0
PC1/SCL0
PC2/SDA1
PC3/SCL1
PC4
PC5
PC6
PC7
V
SS
PD0/KS0
PD1/KS1
PD2/KS2
PD3/KS3
PD4/KS4
PD5/KS5
PD6/KS6
PD7/KS7
PE0
PE1
PE2
PE3
PE4
PE5
PE6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
PJ0/AN4/KS8
AV
DD
AV
REF1
AV
REF0
AVss
AN3
AN2
AN1
PI7/AN0
PI6/NMI
PI5/INT7
PI4/INT6
PI3/INT5
PI2/INT4
PI1/INT3
PI0/INT2
PH7/INT1
PH6/INT0
PH5/XOUT
PH4/RTO4
PH3/RTO3
PH2/RTO2
PH1/RTO1
PH0/RTO0
Vss
TX
TEX
V
DD
PG7/SCK2
PG6/SO2
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
PG0/CS1
PG1/SI1
PG2/SO1
PG3/SCK1
PG4/CS2
PF2/CS0
PF4/SO0
PF5/SCK0
PF7/TMO
Note)
1. NC (Pin 88) must be left open. However, use this pin for FLASH EEPROM
incorporated version.
2. Vss (Pins 15, 41, 56 and 90) must be connected to GND.
3. V
DD
(Pins 44, 53 and 89) must be connected to V
DD
.
–3–
PG5/SI2
PF1/EC
PF3/SI0
RST
PE7
PF0
XTAL
PF6/TO
EXTAL
V
DD
V
SS
CXP921064A
Pin Assignment 2
(Top View) 100-pin LQFP package
PJ7/AN11/KS15
PJ6/AN10/KS14
PJ5/AN9/KS13
PJ4/AN8/KS12
PJ3/AN7/KS11
PJ2/AN6/KS10
PB3/AN23
PB2/AN22
PB1/AN21
PB0/AN20
PA7/AN19
PA6/AN18
PA5/AN17
PA4/AN16
PA3/AN15
PA2/AN14
PA1/AN13
PA0/AN12
PJ1/AN5/KS9
PJ0/AN4/KS8
V
SS
V
DD
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
AV
REF0
AVss
AN3
AN2
AN1
PI7/AN0
PI6/NMI
PI5/INT7
PI4/INT6
PI3/INT5
PI2/INT4
PI1/INT3
PI0/INT2
PH7/INT1
PH6/INT0
PH5/XOUT
PH4/RTO4
PH3/RTO3
PH2/RTO2
PH1/RTO1
PH0/RTO0
Vss
TX
TEX
V
DD
PB4/SI3
PB5/SO3
PB6/SCK3
PB7/RMC
PC0/SDA0
PC1/SCL0
PC2/SDA1
PC3/SCL1
PC4
PC5
PC6
PC7
V
SS
PD0/KS0
PD1/KS1
PD2/KS2
PD3/KS3
PD4/KS4
PD5/KS5
PD6/KS6
PD7/KS7
PE0
PE1
PE2
PE3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
NC
AV
REF1
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
PG7/SCK2
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
PG0/CS1
PG1/SI1
PG2/SO1
PG3/SCK1
PG4/CS2
PF2/CS0
PF5/SCK0
PF7/TMO
PF4/SO0
PG5/SI2
PE7
PF0
PF1/EC
PF3/SI0
RST
V
SS
XTAL
PF6/TO
EXTAL
V
DD
Note)
1. NC (Pin 86) must be left open. However, use this pin for FLASH EEPROM
incorporated version.
2. Vss (Pins 13, 39, 54 and 88) must be connected to GND.
3. V
DD
(Pins 42, 51 and 87) must be connected to V
DD
.
–4–
PG6/SO2
PE4
PE5
PE6
AV
DD