HM62W8511H Series
4M High Speed SRAM (512-kword
×
8-bit)
ADE-203-750D (Z)
Rev. 1.0
Sep. 15, 1998
Description
The HM62W8511H is a 4-Mbit high speed static RAM organized 512-kword
×
8-bit. It has realized high
speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell) and high speed
circuit designing technology. It is most appropriate for the application which requires high speed, high
density memory and wide bit width configuration, such as cache and buffer memory in system. The
HM62W8511H is packaged in 400-mil 36-pin SOJ for high density surface mounting.
Features
•
Single supply : 3.3 V
±
0.3 V
•
Access time 12/15 ns (max)
•
Completely static memory
No clock or timing strobe required
•
Equal access and cycle times
•
Directly TTL compatible
All inputs and outputs
•
Operating current : 150/130 mA (max)
•
TTL standby current : 60/50 mA (max)
•
CMOS standby current : 5 mA (max)
: 1 mA (max) (L-version)
•
Data retension current : 0.6 mA (max) (L-version)
•
Data retension voltage : 2 V (min) (L-version)
•
Center V
CC
and V
SS
type pinout
HM62W8511H Series
Ordering Information
Type No.
HM62W8511HJP-12
HM62W8511HJP-15
HM62W8511HLJP-12
HM62W8511HLJP-15
Access time
12 ns
15 ns
12 ns
15 ns
Package
400-mil 36-pin plastic SOJ (CP-36D)
Pin Arrangement
HM62W8511HJP/HLJP Series
A0
A1
A2
A3
A4
CS
I/O1
I/O2
V
CC
V
SS
I/O3
I/O4
WE
A5
A6
A7
A8
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
(Top View)
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A18
A17
A16
A15
OE
I/O8
I/O7
V
SS
V
CC
I/O6
I/O5
A14
A13
A12
A11
A10
NC
2
HM62W8511H Series
Pin Description
Pin name
A0 to A18
I/O1 to I/O8
CS
OE
WE
V
CC
V
SS
NC
Function
Address input
Data input/output
Chip select
Output enable
Write enable
Power supply
Ground
No connection
Block Diagram
(LSB)
A1
A17
A7
A11
A16
A2
A6
A5
(MSB)
V
CC
Row
decoder
Memory matrix
256 rows
×
8 columns
×
256 blocks
×
8 bit
(4,194,304 bits)
V
SS
CS
I/O1
.
.
.
I/O8
Column I/O
Input
data
control
Column decoder
CS
WE
CS
A10 A8 A9 A12 A13 A14 A0 A18 A15 A3 A4
(LSB)
(MSB)
OE
CS
3
HM62W8511H Series
Operation Table
CS
H
L
L
L
L
Note:
OE
×
H
L
H
L
×:
H or L
WE
×
H
H
L
L
Mode
Standby
Output disable
Read
Write
Write
V
CC
current
I
SB
, I
SB1
I
CC
I
CC
I
CC
I
CC
I/O
High-Z
High-Z
Dout
Din
Din
Ref. cycle
—
—
Read cycle (1) to (3)
Write cycle (1)
Write cycle (2)
Absolute Maximum Ratings
Parameter
Supply voltage relative to V
SS
Voltage on any pin relative to V
SS
Power dissipation
Operating temperature
Storage temperature
Storage temperature under bias
Symbol
V
CC
V
T
P
T
Topr
Tstg
Tbias
Value
–0.5 to +4.6
–0.5*
1
to V
CC
+0.5*
2
1.0
0 to +70
–55 to +125
–10 to +85
Unit
V
V
W
°C
°C
°C
Notes: 1. V
T
(min) = –2.0 V for pulse width (under shoot)
≤
8 ns
2. V
T
(max) = V
CC
+2.0 V for pulse width (over shoot)≤ 8 ns
Recommended DC Operating Conditions
(Ta = 0 to +70°C)
Parameter
Supply voltage
Symbol
V
CC
*
3
V
SS
*
4
Input voltage
V
IH
V
IL
Notes: 1.
2.
3.
4.
Min
3.0
0
2.2
–0.5*
1
Typ
3.3
0
—
—
Max
3.6
0
V
CC
+ 0.5*
2
0.8
Unit
V
V
V
V
V
IL
(min) = –2.0 V for pulse width (under shoot)
≤
8 ns
V
IH
(max) = V
CC
+2.0 V for pulse width (over shoot)≤ 8 ns
The supply voltage with all V
CC
pins must be on the same level.
The supply voltage with all V
SS
pins must be on the same level.
4
HM62W8511H Series
DC Characteristics
(Ta = 0 to +70°C, V
CC
= 3.3 V
±
0.3 V, V
SS
= 0V)
Parameter
Input leakage current
Output leakage current
Operation power
supply current
Symbol Min
II
LI
I
II
LO
I
12 ns cycle I
CC
—
—
—
Typ*
1
—
—
—
Max
2
2
150
Unit
µA
µA
mA
Test conditions
Vin = V
SS
to V
CC
Vin = V
SS
to V
CC
Min cycle
CS
= V
IL
, lout = 0 mA
Other inputs = V
IH
/V
IL
15 ns cycle I
CC
Standby power supply
current
12 ns cycle I
SB
—
—
—
—
130
60
mA
Min cycle
CS
= V
IH
,
Other inputs = V
IH
/V
IL
15 ns cycle I
SB
I
SB1
—
—
—
0.05
50
5
mA
f = 0 MHz
V
CC
≥
CS
≥
V
CC
- 0.2 V,
(1) 0 V
≤
Vin
≤
0.2 V or
(2) V
CC
≥
Vin
≥
V
CC
- 0.2 V
—*
2
Output voltage
V
OL
V
OH
—
2.4
0.05*
2
—
—
1.0*
2
0.4
—
V
V
I
OL
= 8 mA
I
OH
= –4 mA
Notes: 1. Typical values are at V
CC
= 3.3 V, Ta = +25°C and not guaranteed.
2. This characteristics is guaranteed only for L-version.
Capacitance
(Ta = +25°C, f = 1.0 MHz)
Parameter
Input capacitance*
1
Input/output capacitance*
1
Note:
Symbol
Cin
C
I/O
Min
—
—
Typ
—
—
Max
6
8
Unit
pF
pF
Test conditions
Vin = 0 V
V
I/O
= 0 V
1. This parameter is sampled and not 100% tested.
5