M37150M6/M8/MA/MC/MF-XXXFP, M37150EFFP
SNGLE-CHIP 8-BIT CMOS MICROCOMPUTER
REJ03B0128-0100Z
Rev.1.00
Nov 01, 2002
1. DESCRIPTION
The M37150M6/M8/MA/MC/MF-XXXFP and M37150EFFP are
single-chip microcomputers designed with CMOS silicon gate tech-
nology. They have an OSD, data slicer, and I
2
C-BUS interface, mak-
ing them perfect for TV channel selection systems with a closed cap-
tion decoder. The M37150EFFP has a built-in PROM that can be
written electrically.
●OSD
function
Display characters ................................... 32 characters
✕
2 lines
(3 lines or more can be displayed by software)
Kinds of characters ........................................................ 254 kinds
(coloring unit)
(per charactor unit)
Character display area ............................ CC mode: 16
✕
26 dots
OSD mode: 16
✕
20 dots
Kinds of character sizes ..................................... CC mode: 1 kind
OSD mode: 8 kinds
Kinds of character colors .................................. 8 colors (R, G, B)
Coloring unit ................... character, character background, raster
Display position
Horizontal: 128 levels
Vertical: 512 levels
Attribute ........................................................................................
CC mode: smooth italic, underline, flash, automatic solid space
OSD mode: border
Smoth roll-up
Window function
2. FEATURES
●Number
of basic instructions .................................................... 71
●Memory
size
ROM .............. 24K bytes
(M37150M6-XXXFP)
32K bytes
(M37150M8-XXXFP)
40K bytes
(M37150MA-XXXFP)
48K bytes
(M37150MC-XXXFP)
60K bytes
(M37150MF-XXXFP, M37150EFFP)
RAM ............... 1024 bytes
(M37150M6-XXXFP)
1152 bytes
(M37150M8-XXXFP)
1472 bytes
(M37150MA-XXXFP, M37150MC-XXXFP)
2048 bytes
(M37150MF-XXXFP, M37150EFFP)
(*ROM correction memory included)
●Minimum
instruction execution time
................................ 0.447
µs
(at 3.58 MHz oscillation frequency)
................................ 0.451
µs
(at 4.43 MHz oscillation frequency)
●Power
source voltage ................................................. 5 V ± 10 %
●Subroutine
nesting ............................................. 128 levels (Max.)
●Interrupts
....................................................... 17 types, 16 vectors
●8-bit
timers .................................................................................. 6
●Programmable
I/O ports (Ports P0, P1, P2, P3
0
, P3
1
) ............. 25
●Serial
I/O ............................................................ 8-bit
✕
1 channel
●Multi-master
I
2
C-BUS interface .............................. 1 (3 systems)
●A-D
comparator (7-bit resolution) ................................ 8 channels
●PWM
output circuit ......................................................... 8-bit
✕
5
●Power
dissipation
In high-speed mode ......................................................... 165 mW
(at V
CC
= 5.5V, FSCIN = 3.58 MHz, OSD on, and Data slicer on)
In low-speed mode ......................................................... 0.33 mW
(at V
CC
= 5.5V, 32 kHz oscillation frequency)
●Closed
caption data slicer
●ROM
correction function ................................................ 2 vectors
3. APPLICATION
TV with closed caption decoder
Rev.1.00 Nov 01, 2002
REJ03B0128-0100Z
page 1 of 139
M37150M6/M8/MA/MC/MF-XXXFP, M37150EFFP
TABLE OF CONTENTS
1. DESCRIPTION ............................................................... 1
2. FEATURES .................................................................... 1
3. APPLICATION ................................................................ 1
4. PIN CONFIGURATION .................................................. 3
5. FUNCTIONAL BLOCK DIAGRAM ................................. 4
6. PERFORMANCE OVERVIEW ....................................... 5
7. PIN DESCRIPTION ........................................................ 7
8. FUNCTIONAL DESCRIPTION ..................................... 12
8.1 CENTRAL PROCESSING UNIT (CPU) .......... 12
8.2 MEMORY ........................................................ 13
8.3 INTERRUPTS ................................................. 18
8.4 TIMERS .......................................................... 23
8.5 SERIAL I/O ..................................................... 27
8.6 MULTI-MASTER I
2
C-BUS INTERFACE ......... 30
8.7 PWM OUTPUT FUNCTION ............................ 43
8.8 A-D COMPARATOR ........................................ 47
8.9 ROM CORRECTION FUNCTION ................... 49
8.10 DATA SLICER ............................................... 50
8.11 OSD FUNCTIONS ........................................ 61
8.11.1 Display Position ................................. 66
8.11.2 Dot Size ............................................. 70
8.11.3 Clock for OSD .................................... 71
8.11.4 Field Determination Display ............... 72
8.11.5 Memory for OSD ................................ 74
8.11.6 Character color .................................. 78
8.11.7 Character background color ............... 78
8.11.8 OUT signals ....................................... 79
8.11.9 Attribute .............................................. 80
8.11.10 Multiline Display ............................... 85
8.11.11 Automatic Solid Space Function ....... 86
8.11.12 Scan Mode ....................................... 87
8.11.13 Window Function ............................. 87
8.11.14 OSD Output Pin Control ................... 89
8.11.15 Raster Coloring Function ................. 90
8.12 SOFTWARE RUNAWAY DETECT FUNCTION .... 92
8.13 RESET CIRCUIT .......................................... 93
8.14 CLOCK GENERATING CIRCUIT ................. 94
8.15 AUTO-CLEAR CIRCUIT ............................. 100
8.16 ADDRESSING MODE ................................ 100
8.17 MACHINE INSTRUCTIONS ....................... 100
9. TECHNICAL NOTES ................................................. 100
10. ABSOLUTE MAXIMUM RATINGS ........................... 101
11. RECOMMENDED OPERATING CONDITIONS ....... 101
12. ELECTRIC CHARACTERISTICS ............................ 102
13. A-D CONVERTER CHARACTERISTICS ................. 104
14. MULTI-MASTER I
2
C-BUS BUS LINE CHARACTERISTICS ..... 104
15. PROM PROGRAMMING METHOD ......................... 105
16. DATA REQUIRED FOR MASK ORDERS ................ 106
17. ONE TIME PROM VERSION M37150EFFP MARKING .............. 107
18. APPENDIX ............................................................... 108
19. PACKAGE OUTLINE ............................................... 139
Rev.1.00 Nov 01, 2002
REJ03B0128-0100Z
page 2 of 139
M37150M6/M8/MA/MC/MF-XXXFP, M37150EFFP
4. PIN CONFIGURATION
P1
1
/SCL1
P0
0
/PWM0
P0
1
/PWM1
P0
2
/PWM2
P0
3
/PWM3/AD1
P0
4
/PWM4/AD2
P0
5
/AD3
P0
6
/INT2/AD4
P0
7
/INT1
P2
0
/SCLK/AD5
P2
1
/SOUT/AD6
P2
2
/SIN/AD7
P2
3
/TIM3
P2
4
/TIM2
P2
5
/INT3
P2
6
/X
CIN
P2
7
/X
COUT
CNV
SS
NC
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
P1
2
/SCL2
P1
3
/SDA1
P1
4
/SDA2
P1
6
/AD8/TIM2
P5
0
/H
SYNC
P5
1
/V
SYNC
P5
2
/B
P5
3
/G
P5
4
/R
P5
5
/OUT
CLK
CONT
/P1
0
P3
0
/SDA3
P3
1
/SCL3
P1
5
FSCIN
RESET
CVIN
V
HOLD
HLF
FILT
V
CC
Outline 42P2R
M37150M6/M8/MA/MC/MF-XXXFP, M37150EFFP
* Open 20-pin.
Fig. 4.1 Pin Configuration (Top View)
Rev.1.00 Nov 01, 2002
REJ03B0128-0100Z
page 3 of 139
I/O ports P2
6
, P2
7
Pins for data slicer
V
CC
V
SS
CNV
SS
21
18
26
25
24
16
17
22
Clock input
CV
IN
V
HOLD
HLF
X
C IN
X
C OUT
Reset input
sub-clock input
sub-clock output
FSCIN
FILT
RESET
28
23
27
INT1
INT2
INT3
AD1
–
8
SDA3
SDA2
SDA1
SCL3
SCL2
SCL1
S
IN
S
CLK
S
OUT
PWM4
PWM3
PWM2
PWM1
PWM0
9
8 7 6 5 4 3
2
17 16 15 14 13 12 11 10
30 31
39 29 40 41 42 1 32
I/O port P0
I/O port P2
I/O port P1
I/O port P3
0
, P3
1
Output for display
Output port
P5
2
–P5
5
OUT
R
G
B
VSYNC
HSYNC
Rev.1.00 Nov 01, 2002
REJ03B0128-0100Z
Data slicer
TIM2
TIM3
Clock
generating
circuit
Timer count source
selection circuit
Timer
1
T1 (8)
Timer
2
T2 (8)
Timer
3
T3 (8)
Timer
4
T4 (8)
Timer
5
T5 (8)
Timer
6
T6 (8)
Instruction
register (8)
Instruction
decoder
OSD
circuit
Control signal
Fig. 5.1 Functional Block Diagram of M37150
Program
counter
Data bus
5. FUNCTIONAL BLOCK DIAGRAM
M37150M6/M8/MA/MC/MF-XXXFP, M37150EFFP
page 4 of 139
ROM
PC
L
(8)
Index
register
ROM
correction circuit
RAM
Progam
counter
PC
H
(8)
Address bus
8-bit
arithmetic
and
logical unit
Accumulator
A (8)
Y (8)
Index
register
Processor
status
register
PS (8)
X (8)
Stack
pointer
S (8)
A-D
comparator
Multi-master I
2
C-BUS
interface
SI/O
PWM
Correction
function
ROM
P0 (8)
P2 (8)
P3 (2)
P1 (7)
33
34 35 36
37
38
Synchronous signal input
Input port
P5
0
,P5
1
M37150M6/M8/MA/MC/MF-XXXFP, M37150EFFP
6. PERFORMANCE OVERVIEW
Table 6.1 Performance Overview
Parameter
Number of basic instructions
Instruction execution time
Functions
71
0.447 ms (the minimum instruction execution time, at 3.58 MHz oscillation
frequency, f(X
IN
) = 8.95 MHz)
0.451 ms (the minimum instruction execution time, at 4.43 MHz oscillation
frequency, f(X
IN
) = 8.86 MHz)
8.95 MHz (maximum)
24K bytes
32K bytes
40K bytes
48K bytes
60K bytes
1024 bytes (ROM correction memory included)
1152 bytes (ROM correction memory included)
1472 bytes (ROM correction memory included)
2048 bytes (ROM correction memory included)
8-bit
✕
1 (N-channel open-drain output structure, can be used as PWM
output pins, INT input pins, A-D input pin)
7-bit
✕
1 (CMOS input/output structure, however, N-channel open-drain
output structure, when P1
1
–P1
4
are used as multi-master I
2
C-BUS inter-
face, can be used as A-D input pins, timer external clock input pins, multi-
master I
2
C-BUS interface)
8-bit
✕
1 (P2 is CMOS input/output structure, however, N-channel open-
drain output structure when P2
0
and 2
1
are used as serial output, can be
used as serial input/output pins, timer external clock input pins, A-D input
pins, INT input pin, sub-clock input/output pins)
2-bit
✕
1 (CMOS input/output structure, however, N-channel open-drain output structure,
when used as multi-master I
2
C-BUS interface, can be used as multi-master I
2
C-BUS interface.)
2-bit
✕
1(can be used as OSD input pins)
4-bit
✕
1(CMOS output structures, can be used as OSD output pins)
8-bit
✕
1
I
2
C-BUS
interface
One (Three lines)
8 channels (7-bit resolution)
8-bit
✕
5
8-bit
✕
6
2 vectors
128 levels (maximum)
<17 types>
INT external interrupt
✕
3, Internal timer interrupt
✕
6, Serial I/O interrupt
✕
1, OSD interrupt
✕
1, Multi-master I
2
C-BUS interface interrupt
✕
1, Data
slicer interrupt
✕
1, f(X
IN
)/4096 interrupt
✕
1, V
SYNC
interrupt
✕
1, BRK
instruction interrupt
✕
1, reset
✕
1
2 built-in circuits (externally connected to X
CIN/OUT
is a ceramic resonator
or a quartz-crystal oscillator)
Built-in
Clock frequency
Memory size
ROM M37150M6-XXXFP
M37150M8-XXXFP
M37150MA-XXXFP
M37150MC-XXXFP
M37150MF-XXXFP
RAM M37150M6-XXXFP
M37150M8-XXXFP
M37150MA-XXXFP, M37150MC-XXXFP
M37150MF-XXXFP, M37150EFFP
P0
P1
0
–P1
6
I/O
I/O
Input/Output
ports
P2
0
–P2
7
I/O
P3
0
, P3
1
P5
0
, P5
1
P5
2
–P5
5
Serial I/O
Multi-master
A-D comparator
PWM output circuit
Timers
ROM correction function
Subroutine nesting
Interrupt
I/O
Input
Output
Clock generating circuit
Data slicer
Rev.1.00 Nov 01, 2002
REJ03B0128-0100Z
page 5 of 139
京公网安备 11010802033920号
EEWORLD
