DDU224F
10-TAP, TTL-INTERFACED
FIXED DELAY LINE
(SERIES DDU224F)
FEATURES
•
•
•
•
•
Ten equally spaced outputs
Very narrow device (SIP package)
Stackable for PC board economy
Input & outputs fully TTL interfaced & buffered
10 T
2
L fan-out capability
data
3
®
delay
devices,
inc.
PACKAGES
1 2 3 4 5 6 7 8 9 10 11 12 13 14
VCC N/C IN T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 GND
DDU224F-xx Commercial
DDU224F-xxM Military
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The DDU224F-series device is a 10-tap digitally buffered delay line. The
IN
Signal Input
signal input (IN) is reproduced at the outputs (T1-T10), shifted in time by
T1-T10 Tap Outputs
an amount determined by the device dash number. The nominal tap-to-
VCC +5 Volts
tap delay increment is given by 1/10 of the dash number. For dash
GND Ground
numbers less than 50, the total delay of the line is measured from T1 to
T10, with the nominal value given by 9 times the increment. The inherent delay from IN to T1 is nominally
3.5ns. For dash numbers greater than or equal to 50, the total delay of the line is measured from IN to
T10, with the nominal value given by the dash number.
SERIES SPECIFICATIONS
•
•
•
•
•
•
Minimum input pulse width:
20% of total delay
Output rise time:
2ns typical
Supply voltage:
5VDC
±
5%
Supply current:
I
CCL
= 50ma typical
I
CCH
= 15ma typical
Operating temperature:
0° to 70° C
Temp. coefficient of total delay:
100 PPM/°C
DASH NUMBER SPECIFICATIONS
Part
Number
DDU224F-10
DDU224F-20
DDU224F-25
DDU224F-50
DDU224F-100
DDU224F-150
DDU224F-200
DDU224F-250
DDU224F-300
DDU224F-400
DDU224F-500
Total
Delay (ns)
9
±
2.0 *
18
±
2.0 *
22.5
±
2.0 *
50
±
2.5
100
±
5.0
150
±
7.5
200
±
10.0
250
±
12.5
300
±
15.0
400
±
20.0
500
±
25.0
Delay Per
Tap (ns)
1.0
±
0.5
2.0
±
1.0
2.5
±
1.0
5.0
±
2.0
10.0
±
3.0
15.0
±
3.0
20.0
±
3.0
25.0
±
3.0
30.0
±
3.0
40.0
±
4.0
50.0
±
5.0
* Total delay is referenced to first tap output
Input to first tap = 3.5ns
±
1ns
NOTE: Any dash number between 10 and 500 not
shown is also available.
©
1997 Data Delay Devices
Doc #97015
1/29/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
DDU224F
APPLICATION NOTES
HIGH FREQUENCY RESPONSE
The DDU224F tolerances are guaranteed for
input pulse widths and periods greater than those
specified in the test conditions. Although the
device will function properly for pulse widths as
small as 20% of the total delay and periods as
small as 40% of the total delay (for a symmetric
input), the delays may deviate from their values
at low frequency. However, for a given input
condition, the deviation will be repeatable from
pulse to pulse. Contact technical support at Data
Delay Devices if your application requires device
testing at a specific input condition.
POWER SUPPLY BYPASSING
The DDU224F relies on a stable power supply to
produce repeatable delays within the stated
tolerances. A 0.1uf capacitor from VCC to GND,
located as close as possible to the VCC pin, is
recommended. A wide VCC trace and a clean
ground plane should be used.
3.5ns
10%
10%
10%
10%
10%
10%
10%
10%
10%
VCC IN
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10 GND
Functional diagram for dash numbers < 50
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
VCC IN
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10 GND
Functional diagram for dash numbers >= 50
Doc #97015
1/29/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
2
DDU224F
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Supply Voltage
Input Pin Voltage
Storage Temperature
Lead Temperature
SYMBOL
V
CC
V
IN
T
STRG
T
LEAD
MIN
-0.3
-0.3
-55
MAX
7.0
V
DD
+0.3
150
300
UNITS
V
V
C
C
NOTES
10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V)
PARAMETER
High Level Output Voltage
Low Level Output Voltage
High Level Output Current
Low Level Output Current
High Level Input Voltage
Low Level Input Voltage
Input Clamp Voltage
Input Current at Maximum
Input Voltage
High Level Input Current
Low Level Input Current
Short-circuit Output Current
Output High Fan-out
Output Low Fan-out
SYMBOL
V
OH
V
OL
I
OH
I
OL
V
IH
V
IL
V
IK
I
IHH
I
IH
I
IL
I
OS
MIN
2.5
TYP
3.4
0.35
MAX
UNITS
V
V
mA
mA
V
V
V
mA
µA
mA
mA
Unit
Load
NOTES
V
CC
= MIN, I
OH
= MAX
V
IH
= MIN, V
IL
= MAX
V
CC
= MIN, I
OL
= MAX
V
IH
= MIN, V
IL
= MAX
0.5
-1.0
20.0
2.0
0.8
-1.2
0.1
20
-0.6
-150
25
12.5
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX
-60
PACKAGE DIMENSIONS
1
2
3
4
5
6
7
8
9
10 11 12 13 14
.200
MAX.
1.450 TYP.
.010
TYP.
.320
MAX.
.020 TYP.
1.300 TYP.
.100
TYP.
.100
MIN.
.010
TYP.
DDU224F-xx (Commercial)
DDU224F-xxM (Military)
Doc #97015
1/29/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
DDU224F
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
Ambient Temperature:
25
o
C
±
3
o
C
Supply Voltage (Vcc):
5.0V
±
0.1V
Input Pulse:
High = 3.0V
±
0.1V
Low = 0.0V
±
0.1V
Source Impedance:
50Ω Max.
Rise/Fall Time:
3.0 ns Max. (measured
between 0.6V and 2.4V )
Pulse Width:
PW
IN
= 1.5 x Total Delay
Period:
PER
IN
= 10 x Total Delay
OUTPUT:
Load:
C
load
:
Threshold:
1 FAST-TTL Gate
5pf
±
10%
1.5V (Rising & Falling)
NOTE:
The above conditions are for test only and do not in any way restrict the operation of the device.
COMPUTER
SYSTEM
PRINTER
T1
PULSE
GENERATOR
OUT
TRIG
DEVICE UNDER
TEST (DUT)
IN
T2
T3
T4
T5
T6
T7
T8
T9
T10
REF
IN
TRIG
TIME INTERVAL
COUNTER
Test Setup
PER
IN
PW
IN
T
RISE
INPUT
SIGNAL
2.4V
1.5V
0.6V
T
FALL
V
IH
2.4V
1.5V
0.6V
V
IL
T
FALL
T
RISE
OUTPUT
SIGNAL
V
OH
1.5V
1.5V
V
OL
Timing Diagram For Testing
Doc #97015
1/29/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com
4
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