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HYB514800BJ-60

Description
512kx8-Bit Dynamic RAM
Categorystorage    storage   
File Size207KB,22 Pages
ManufacturerSIEMENS
Websitehttp://www.infineon.com/
Download Datasheet Parametric Compare View All

HYB514800BJ-60 Overview

512kx8-Bit Dynamic RAM

HYB514800BJ-60 Parametric

Parameter NameAttribute value
MakerSIEMENS
package instruction,
Reach Compliance Codeunknow
ECCN codeEAR99
access modeFAST PAGE
Maximum access time60 ns
Other featuresRAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
JESD-30 codeR-PDSO-J28
memory density4194304 bi
Memory IC TypeFAST PAGE DRAM
memory width8
Number of functions1
Number of ports1
Number of terminals28
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize512KX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Certification statusNot Qualified
refresh cycle1024
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formJ BEND
Terminal locationDUAL
512kx8-Bit Dynamic RAM
HYB 514800BJ -60/-70/-80
Advanced Information
512 288 words by 8-bit organization
0 to 70 ˚C operating temperature
Fast access and cycle time
RAS access time:
60 ns (-60 version)
70 ns (-70 version)
80 ns (-80 version)
CAS access time:
20 ns
Cycle time:
110 ns (-60 version)
130 ns (-70 version)
150 ns (-80 version)
Fast page mode cycle time
45 ns (-60 version)
45 ns (-70 version)
50 ns (-80 version)
Single + 5 V (± 10 %) supply with a
built-in
V
bb
generator
Low power dissipation
max. 605 mW active (-60 version)
max. 550 mW active (-70 version)
max. 468 mW active (-80 version)
Standby power dissipation:
11 mW standby standby (TTL)
5.5 mW max.standby (CMOS)
Output unlatched at cycle end allows two-
dimensional chip selection
Read, write, read-modify write, CAS-before-
RAS refresh, RAS-only refresh, hidden
refresh, fast page mode capability
All inputs and outputs TTL-compatible
1024 refresh cycles / 16 ms
Plastic Packages: P-SOJ-28-2 400 mil width
Ordering Information
Type
HYB 514800BJ-60
HYB 514800BJ-70
HYB 514800BJ-80
Ordering Code
Q67100-Q849
Q67100-Q850
Q67100-Q851
Package
P-SOJ-28-2
P-SOJ-28-2
P-SOJ-28-2
Descriptions
DRAM
(access time 60 ns)
DRAM
(access time 70 ns)
DRAM
(access time 80 ns)
Semiconductor Group
125
01.95

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