Integrated
Circuit
Systems, Inc.
ICS843021
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
F
EATURES
•
1 differential 3.3V LVPECL output
•
Crystal oscillator interface designed for 22.4MHz - 28MHz,
18pF parallel resonant crystal
•
Output frequency range: 112MHz - 140MHz
•
VCO range: 560MHz to 700MHz
•
Output duty cycle range: 49% - 51%
•
RMS phase jitter @ 125MHz, using a 25MHz crystal
(1.875MHz - 20MHz): 0.37ps (typical)
•
RMS phase noise at 125MHz (typical)
Offset
Noise Power
100Hz ............... -94.2 dBc/Hz
1KHz .............. -122.8 dBc/Hz
10KHz .............. -132.2 dBc/Hz
100KHz .............. -131.3 dBc/Hz
•
3.3V operating supply
•
0°C to 70°C ambient operating temperature
•
Industrial temperature information available upon request
•
Lead-Free package fully RoHS compliant
G
ENERAL
D
ESCRIPTION
The ICS843021 is a Gigabit Ethernet Clock
Generator and a member of the HiPerClocks
TM
HiPerClockS™
family of high performance devices from ICS. The
ICS843021 uses a 25MHz crystal to synthesize
125MHz. The ICS843021 has excellent phase jitter
performance, over the 1.875MHz – 20MHz integration range.
The ICS843021 is packaged in a small 8-pin TSSOP, making it
ideal for use in systems with limited board space.
ICS
F
REQUENCY
T
ABLE
- T
YPICAL
A
PPLICATIONS
Inputs
Crystal Frequency (MHz)
25
26.6
Output Frequency (MHz)
125
133
B
LOCK
D
IAGRAM
25MHz
XTAL_IN
P
IN
A
SSIGNMENT
V
CCA
V
EE
XTAL_OUT
XTAL_IN
1
2
3
4
8
7
6
5
V
CC
Q0
nQ0
nc
OSC
XTAL_OUT
Phase
Detector
VCO
÷5
nQ0
Q0
ICS843021
÷25
(fixed)
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm package body
G Package
Top View
843021AG
www.icst.com/products/hiperclocks.html
1
REV. C MARCH 31, 2005
Integrated
Circuit
Systems, Inc.
ICS843021
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
101.7°C/W (0 mps)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
T
ABLE
3A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 3.3V±10%, T
A
=0°C
TO
70°C
Symbol
V
CC
V
CCA
I
EE
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Test Conditions
Minimum
2.97
2.97
Typical
3.3
3.3
Maximum
3.63
3.63
85
Units
V
V
mA
T
ABLE
3B. LVPECL DC C
HARACTERISTICS
,
V
CC
= 3.3V±10%, T
A
=0°C
TO
70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
- 1.4
V
CC
- 2.0
0.6
Typical
Maximum
V
CC
- 0.9
V
CC
- 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50
Ω
to V
CC
- 2V.
T
ABLE
4. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency; NOTE 1
Equivalent Series Resistance (ESR)
Shunt Capacitance
NOTE 1: Input frequency is limited to a range of 22.4MHz - 28MHz due to VCO range.
14
Test Conditions
Minimum
Typical
Fundamental
40
50
7
MHz
Ω
pF
Maximum
Units
T
ABLE
5. AC C
HARACTERISTICS
,
V
CC
= 3.3V±10%, T
A
=0°C
TO
70°C
Symbol
f
OUT
Parameter
Output Frequency
RMS Phase Jitter,
(Random); NOTE 1
Output Rise/Fall Time
Test Conditions
125MHz
(Intergration Range: 1.875MHz to 20MHz)
20% to 80%
Minimum
112
0.37
25 0
49
550
51
Typical
Maximum
140
Units
MHz
ps
ps
%
t
jit(Ø)
t
R
/ t
F
odc
Output Duty Cycle
NOTE 1: Please refer to the Phase Noise Plot.
843021AG
www.icst.com/products/hiperclocks.html
3
REV. C MARCH 31, 2005
Integrated
Circuit
Systems, Inc.
ICS843021
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
T
YPICAL
P
HASE
N
OISE AT
125MH
Z
0
-10
-20
-30
-40
-50
-60
-70
➤
10 Gb Ethernet Filter
125MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.37ps (typical)
N
OISE
P
OWER
dBc
Hz
-80
-90
-100
-110
Raw Phase Noise Data
➤
-120
-130
-140
-150
-160
➤
Phase Noise Result by adding
a 10 Gb Ethernet Filter to raw data
100
1k
10k
100k
1M
10M
100M
-170
-180
-190
O
FFSET
F
REQUENCY
(H
Z
)
843021AG
www.icst.com/products/hiperclocks.html
4
REV. C MARCH 31, 2005
PCB Design
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