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508-DPK

Description
PECL to CMOS/TTL Translator, 1 Func, True Output, CMOS
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size128KB,8 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

508-DPK Overview

PECL to CMOS/TTL Translator, 1 Func, True Output, CMOS

508-DPK Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
package instructionDIE,
Reach Compliance Codecompliant
ECCN codeEAR99
maximum delay9 ns
Interface integrated circuit typePECL TO CMOS/TTL TRANSLATOR
JESD-30 codeX-XUUC-N
JESD-609 codee0
Number of digits1
Number of functions1
Maximum operating temperature70 °C
Minimum operating temperature
Output latch or registerNONE
Output polarityTRUE
Package body materialUNSPECIFIED
encapsulated codeDIE
Package shapeUNSPECIFIED
Package formUNCASED CHIP
Peak Reflow Temperature (Celsius)240
Certification statusNot Qualified
Maximum supply voltage5.5 V
Minimum supply voltage2.375 V
Nominal supply voltage3.3 V
Supply voltage 1-max5.5 V
Mains voltage 1-minute3 V
Supply voltage1-Nom3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formNO LEAD
Terminal locationUPPER
Maximum time at peak reflow temperature30
Base Number Matches1
DATASHEET
PECL TO CMOS CONVERTER
Description
The ICS508 is the most cost effective way to generate
a high quality, high frequency CMOS clock output from
a PECL clock input.
The ICS508 has separate VDD supplies for the PECL
input buffer and the output buffer, allowing different
voltages to be used. For example, the input clock could
use a 3.3 V supply while the output operates from 2.5V.
The device has an Output Enable pin that tri-states the
clock output when the OE pin is taken low.
The ICS508 is a member of IDT’s
family.
ClockBlocks
TM
ICS508
Features
Packaged in 8 pin SOIC (Pb-free) or die
Separate VDD supplies allow voltage translation
Clock frequency of 0 - 250 MHz
Duty cycle of 45/55
Operating voltages of 2.375 to 5.5V
Tri-state output for board level testing
24mA output drive capability
Industrial temperature version available
Advanced, low power, sub-micron CMOS process
Block Diagram
VDDP
VDDC
P E C LIN
P E C LIN
O utput
B uffer
C LK
GND
OE
GND
IDT™ / ICS™
PECL TO CMOS CONVERTER
1
ICS508
REV H 051310

508-DPK Related Products

508-DPK 508-DWF
Description PECL to CMOS/TTL Translator, 1 Func, True Output, CMOS PECL to CMOS/TTL Translator, 1 Func, True Output, CMOS
Is it lead-free? Contains lead Contains lead
Is it Rohs certified? incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
package instruction DIE, DIE,
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
maximum delay 9 ns 9 ns
Interface integrated circuit type PECL TO CMOS/TTL TRANSLATOR PECL TO CMOS/TTL TRANSLATOR
JESD-30 code X-XUUC-N X-XUUC-N
JESD-609 code e0 e0
Number of digits 1 1
Number of functions 1 1
Maximum operating temperature 70 °C 70 °C
Output latch or register NONE NONE
Output polarity TRUE TRUE
Package body material UNSPECIFIED UNSPECIFIED
encapsulated code DIE DIE
Package shape UNSPECIFIED UNSPECIFIED
Package form UNCASED CHIP UNCASED CHIP
Peak Reflow Temperature (Celsius) 240 240
Certification status Not Qualified Not Qualified
Maximum supply voltage 5.5 V 5.5 V
Minimum supply voltage 2.375 V 2.375 V
Nominal supply voltage 3.3 V 3.3 V
Supply voltage 1-max 5.5 V 5.5 V
Mains voltage 1-minute 3 V 3 V
Supply voltage1-Nom 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form NO LEAD NO LEAD
Terminal location UPPER UPPER
Maximum time at peak reflow temperature 30 30
Base Number Matches 1 1

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