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TS80C58X2YYY-VCBD

Description
Microcontroller, 8-Bit, MROM, 8051 CPU, 40MHz, CMOS, PQCC44, PLASTIC, LCC-44
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size597KB,58 Pages
ManufacturerAtmel (Microchip)
Download Datasheet Parametric View All

TS80C58X2YYY-VCBD Overview

Microcontroller, 8-Bit, MROM, 8051 CPU, 40MHz, CMOS, PQCC44, PLASTIC, LCC-44

TS80C58X2YYY-VCBD Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerAtmel (Microchip)
Parts packaging codeLCC
package instructionQCCJ, LDCC44,.7SQ
Contacts44
Reach Compliance Codecompliant
ECCN code3A991.A.2
Has ADCNO
Address bus width16
bit size8
CPU series8051
maximum clock frequency40 MHz
DAC channelNO
DMA channelNO
External data bus width8
JESD-30 codeS-PQCC-J44
JESD-609 codee0
length16.5862 mm
Humidity sensitivity level2
Number of I/O lines32
Number of terminals44
On-chip program ROM width8
Maximum operating temperature70 °C
Minimum operating temperature
PWM channelNO
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC44,.7SQ
Package shapeSQUARE
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)225
power supply5 V
Certification statusNot Qualified
RAM (bytes)256
rom(word)32768
ROM programmabilityMROM
Maximum seat height4.57 mm
speed40 MHz
Maximum slew rate27 mA
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width16.5862 mm
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER
Base Number Matches1
TS80C54X2/C58X2
TS87C54X2/C58X2
8-bit CMOS Microcontroller 16/32 Kbytes ROM/OTP
1. Description
TS80C54/58X2 is high performance CMOS ROM, OTP
and EPROM versions of the 80C51 CMOS single chip
8-bit microcontroller.
The TS80C54/58X2 retains all features of the Atmel
Wireless & Microcontrollers 80C51 with extended
ROM/EPROM capacity (16/32 Kbytes), 256 bytes of
internal RAM, a 6-source , 4-level interrupt system, an
on-chip oscilator and three timer/counters.
In addition, the TS80C54/58X2 has a Hardware
Watchdog Timer, a more versatile serial channel that
facilitates multiprocessor communication (EUART) and
a X2 speed improvement mechanism.
The fully static design of the TS80C54/58X2 allows to
reduce system power consumption by bringing the clock
frequency down to any value, even DC, without loss of
data.
The TS80C54/58X2 has 2 software-selectable modes of
reduced activity for further reduction in power
consumption. In the idle mode the CPU is frozen while
the timers, the serial port and the interrupt system are still
operating. In the power-down mode the RAM is saved
and all other functions are inoperative.
2. Features
q
80C52 Compatible
8051 pin and instruction compatible
Four 8-bit I/O ports
Three 16-bit timer/counters
256 bytes scratchpad RAM
q
Interrupt Structure with
6 Interrupt sources
4 level priority interrupt system
q
Full duplex Enhanced UART
Framing error detection
Automatic address recognition
q
High-Speed Architecture
40 MHz @ 5V, 30MHz @ 3V
X2 Speed Improvement capability (6 clocks/
machine cycle)
30 MHz @ 5V, 20 MHz @ 3V (Equivalent to
60 MHz @ 5V, 40 MHz @ 3V)
q
q
Low EMI (inhibit ALE)
Power Control modes
Idle mode
Power-down mode
Power-off Flag
q
q
q
Dual Data Pointer
On-chip ROM/EPROM (16K-bytes, 32K-bytes)
Programmable Clock Out and Up/Down Timer/
Counter 2
Hardware Watchdog Timer (One-time enabled with
Reset-Out)
Asynchronous port reset
q
q
q
Once mode (On-chip Emulation)
Power supply: 4.5-5.5V, 2.7-5.5V
Temperature ranges: Commercial (0 to 70
o
C) and
Industrial (-40 to 85
o
C)
Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP44
F1, CQPJ44 (window), CDIL40 (window)
q
q
q
Rev. C - 15 January, 2001
1
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