IDT54FCT652CTL datasheet, PDF - EEWORLD Datasheet

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IDT54FCT652CTL: DescriptionFAST CMOS OCTAL TRANSCEIVER/ REGISTERS (3-STATE); File Size122KB，9 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

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IDT54FCT652CTL Overview

FAST CMOS OCTAL TRANSCEIVER/ REGISTERS (3-STATE)

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FAST CMOS OCTAL

TRANSCEIVER/

REGISTERS (3-STATE)

Integrated Device Technology, Inc.

IDT54/74FCT646T/AT/CT/DT - 2646T/AT/CT

IDT54/74FCT648T/AT/CT

IDT54/74FCT652T/AT/CT/DT - 2652T/AT/CT

FEATURES:

• Common features:

– Low input and output leakage

≤1µA

(max.)

– Extended commercial range of –40°C to +85°C

– CMOS power levels

– True TTL input and output compatibility

– V

= 3.3V (typ.)

– V

= 0.3V (typ.)

– Meets or exceeds JEDEC standard 18 specifications

– Product available in Radiation Tolerant and Radiation

Enhanced versions

– Military product compliant to MIL-STD-883, Class B

and DESC listed (dual marked)

– Available in DIP, SOIC, SSOP, QSOP, TSSOP,

CERPACK and LCC packages

• Features for FCT646T/648T/652T:

– Std., A, C and D speed grades

– High drive outputs (-15mA I

, 64mA I

)

– Power off disable outputs permit “live insertion”

• Features for FCT2646T/2652T:

– Std., A, and C speed grades

– Resistor outputs (-15mA I

, 12mA I

Com.)

(-12mA I

, 12mA I

Mil.)

– Reduced system switching noise

DESCRIPTION:

The FCT646T/FCT2646T/FCT648T/FCT652T/2652T con-

sist of a bus transceiver with 3-state D-type flip-flops and

control circuitry arranged for multiplexed transmission of data

directly from the data bus or from the internal storage regis-

ters.

The FCT652T/FCT2652T utilize GAB and

GBA

signals to

control the transceiver functions. The FCT646T/FCT2646T/

FCT648T utilize the enable control (

) and direction (DIR)

pins to control the transceiver functions.

SAB and SBA control pins are provided to select either real-

time or stored data transfer. The circuitry used for select

control will eliminate the typical decoding glitch that occurs in

a multiplexer during the transition between stored and real-

time data. A LOW input level selects real-time data and a

HIGH selects stored data.

Data on the A or B data bus, or both, can be stored in the

internal D flip-flops by LOW-to-HIGH transitions at the appro-

priate clock pins (CPAB or CPBA), regardless of the select or

enable control pins.

The FCT26xxT have balanced drive outputs with current

limiting resistors. This offers low ground bounce, minimal

undershoot and controlled output fall times-reducing the need

for external series terminating resistors. FCT2xxxT parts are

plug-in replacements for FCTxxxT parts.

IDT54/74FCT652/2652

ONLY

GBA

GAB

FUNCTIONAL BLOCK DIAGRAM

IDT54/74FCT646/2646/648

ONLY

DIR

CPBA

SBA

CPAB

SAB

B REG

1 OF 8 CHANNELS

646/2646/652/2652

ONLY

A REG

646/2646/652/2652

ONLY

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

2634 drw 01

TO 7 OTHER CHANNELS

MILITARY AND COMMERCIAL TEMPERATURE RANGES

Integrated Device Technology, Inc.

SEPTEMBER 1996

DSC-2634/9

6.20

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