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IDT71421SA55TFI

Description
2K X 8 DUAL-PORT SRAM, 25 ns, PQFP64
Categorystorage   
File Size256KB,16 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Download Datasheet Parametric View All

IDT71421SA55TFI Overview

2K X 8 DUAL-PORT SRAM, 25 ns, PQFP64

IDT71421SA55TFI Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals64
Maximum operating temperature85 Cel
Minimum operating temperature-40 Cel
Maximum supply/operating voltage5.5 V
Minimum supply/operating voltage4.5 V
Rated supply voltage5 V
maximum access time25 ns
Processing package description10 X 10 MM, 1.40 MM HEIGHT, STQFP-64
stateACTIVE
CraftsmanshipCMOS
packaging shapeSQUARE
Package SizeFLATPACK, THIN PROFILE, FINE PITCH
surface mountYes
Terminal formGULL WING
Terminal spacing0.5000 mm
terminal coatingTIN LEAD
Terminal locationQUAD
Packaging MaterialsPLASTIC/EPOXY
Temperature levelINDUSTRIAL
memory width8
organize2K X 8
storage density16384 deg
operating modeASYNCHRONOUS
Number of digits2048 words
Number of digits2K
Memory IC typeDUAL-PORT SRAM
serial parallelPARALLEL
HIGH SPEED
2K x 8 DUAL PORT
STATIC RAM
IDT7132SA/LA
IDT7142SA/LA
Features
High-speed access
– Commercial: 20/25/35/55/100ns (max.)
– Industrial: 25ns (max.)
– Military: 25/35/55/100ns (max.)
Low-power operation
– IDT7132/42SA
Active: 325mW (typ.)
Standby: 5mW (typ.)
– IDT7132/42LA
Active: 325mW (typ.)
Standby: 1mW (typ.)
MASTER IDT7132 easily expands data bus width to 16-or-more
bits using SLAVE IDT7142
On-chip port arbitration logic (IDT7132 only)
BUSY
output flag on IDT7132;
BUSY
input on IDT7142
Battery backup operation —2V data retention (LA only)
TTL-compatible, single 5V ±10% power supply
Available in 48-pin DIP, LCC and Flatpack, and 52-pin PLCC
packages
Military product compliant to MIL-PRF-38535 QML
Industrial temperature range (–40°C to +85°C) is available for
selected speeds
Functional Block Diagram
OE
L
CE
L
R/W
L
OE
R
CE
R
R/W
R
I/O
OL-
I/O
7L
I/O
Control
I/O
Control
I/O
OR-
I/O
7R
m
BUSY
L
(1,2)
A
10L
A
0L
Address
Decoder
11
BUSY
R
(1,2)
MEMORY
ARRAY
11
Address
Decoder
A
10R
A
0R
CE
L
OE
L
R/W
L
ARBITRATION
LOGIC
CE
R
OE
R
R/W
R
2692 drw 01
NOTES:
1. IDT7132 (MASTER):
BUSY
is open drain output and requires pullup resistor of 270Ω.
IDT7142 (SLAVE):
BUSY
is input.
2. Open drain output: requires pullup resistor of 270Ω.
JUNE 2004
1
©2004 Integrated Device Technology, Inc.
DSC-2692/16
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