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ISPGAL16Z8-20LPB

Description
EE PLD, 20ns, CMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24
CategoryProgrammable logic devices    Programmable logic   
File Size513KB,13 Pages
ManufacturerLattice
Websitehttp://www.latticesemi.com
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ISPGAL16Z8-20LPB Overview

EE PLD, 20ns, CMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24

ISPGAL16Z8-20LPB Parametric

Parameter NameAttribute value
MakerLattice
Parts packaging codeDIP
package instructionDIP,
Contacts24
Reach Compliance Codecompliant
ECCN codeEAR99
maximum clock frequency33.3 MHz
JESD-30 codeR-PDIP-T24
length31.75 mm
Dedicated input times8
Number of I/O lines8
Number of terminals24
Maximum operating temperature75 °C
Minimum operating temperature
organize8 DEDICATED INPUTS, 8 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Programmable logic typeEE PLD
propagation delay20 ns
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum supply voltage5.25 V
Minimum supply voltage4.75 V
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL EXTENDED
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width7.62 mm
Base Number Matches1

ISPGAL16Z8-20LPB Related Products

ISPGAL16Z8-20LPB ISPGAL16Z8-25LJB ISPGAL16Z8-25LPB ISPGAL16Z8-20LJB
Description EE PLD, 20ns, CMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24 EE PLD, 25ns, CMOS, PQCC28, PLASTIC, LCC-28 EE PLD, 25ns, CMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24 EE PLD, 20ns, CMOS, PQCC28, PLASTIC, LCC-28
Maker Lattice Lattice Lattice Lattice
Parts packaging code DIP QLCC DIP QLCC
package instruction DIP, QCCJ, DIP, QCCJ,
Contacts 24 28 24 28
Reach Compliance Code compliant compliant compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99
maximum clock frequency 33.3 MHz 28.5 MHz 28.5 MHz 33.3 MHz
JESD-30 code R-PDIP-T24 S-PQCC-J28 R-PDIP-T24 S-PQCC-J28
length 31.75 mm 11.5316 mm 31.75 mm 11.5316 mm
Dedicated input times 8 8 8 8
Number of I/O lines 8 8 8 8
Number of terminals 24 28 24 28
Maximum operating temperature 75 °C 75 °C 75 °C 75 °C
organize 8 DEDICATED INPUTS, 8 I/O 8 DEDICATED INPUTS, 8 I/O 8 DEDICATED INPUTS, 8 I/O 8 DEDICATED INPUTS, 8 I/O
Output function MACROCELL MACROCELL MACROCELL MACROCELL
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code DIP QCCJ DIP QCCJ
Package shape RECTANGULAR SQUARE RECTANGULAR SQUARE
Package form IN-LINE CHIP CARRIER IN-LINE CHIP CARRIER
Programmable logic type EE PLD EE PLD EE PLD EE PLD
propagation delay 20 ns 25 ns 25 ns 20 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 5.08 mm 4.57 mm 5.08 mm 4.57 mm
Maximum supply voltage 5.25 V 5.25 V 5.25 V 5.25 V
Minimum supply voltage 4.75 V 4.75 V 4.75 V 4.75 V
Nominal supply voltage 5 V 5 V 5 V 5 V
surface mount NO YES NO YES
technology CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL EXTENDED COMMERCIAL EXTENDED COMMERCIAL EXTENDED COMMERCIAL EXTENDED
Terminal form THROUGH-HOLE J BEND THROUGH-HOLE J BEND
Terminal pitch 2.54 mm 1.27 mm 2.54 mm 1.27 mm
Terminal location DUAL QUAD DUAL QUAD
width 7.62 mm 11.5316 mm 7.62 mm 11.5316 mm
Base Number Matches 1 1 1 1
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