74HC2G08; 74HCT2G08
Dual 2-input AND gate
Rev. 5 — 8 October 2013
Product data sheet
1. General description
The 74HC2G08; 74HCT2G08 is a dual 2-input AND gate. Inputs include clamp diodes.
This enables the use of current limiting resistors to interface inputs to voltages in excess
of V
CC
.
2. Features and benefits
Wide supply voltage range from 2.0 V to 6.0 V
Input levels:
For 74HC2G08: CMOS level
For 74HCT2G08: TTL level
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
Multiple package options
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from
40 C
to +85
C
and
40 C
to +125
C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74HC2G08DP
74HCT2G08DP
74HC2G08DC
74HCT2G08DC
74HC2G08GD
74HCT2G08GD
40 C
to +125
C
XSON8
40 C
to +125
C
VSSOP8
40 C
to +125
C
Name
TSSOP8
Description
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
Version
SOT505-2
Type number
plastic very thin shrink small outline package; 8 leads; SOT765-1
body width 2.3 mm
plastic extremely thin small outline package; no leads; SOT996-2
8 terminals; body 3
2
0.5 mm
NXP Semiconductors
74HC2G08; 74HCT2G08
Dual 2-input AND gate
4. Marking
Table 2.
Marking code
Marking code
[1]
H08
T08
H08
T08
H08
T08
Type number
74HC2G08DP
74HCT2G08DP
74HC2G08DC
74HCT2G08DC
74HC2G08GD
74HCT2G08GD
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
&
1A
1B
2A
2B
1Y
2Y
&
001aah788
001aah789
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
A
Y
B
mna221
Fig 3.
Logic diagram (one gate)
74HC_HCT2G08
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 5 — 8 October 2013
2 of 15
NXP Semiconductors
74HC2G08; 74HCT2G08
Dual 2-input AND gate
6. Pinning information
6.1 Pinning
74HC2G08
74HCT2G08
1A
1
2
3
4
8
7
6
5
V
CC
1Y
2B
2A
74HC2G08
74HCT2G08
1A
1B
2Y
GND
1
2
3
4
001aak018
1B
8
7
6
5
V
CC
1Y
2B
2A
2Y
GND
001aak019
Transparent top view
Fig 4.
Pin configuration SOT505-2 (TSSOP8) and
SOT765-1 (VSSOP8)
Fig 5.
Pin configuration SOT996-2 (XSON8)
6.2 Pin description
Table 3.
Symbol
1A, 2A
1B, 2B
GND
1Y, 2Y
V
CC
Pin description
Pin
1, 5
2, 6
4
7, 3
8
Description
data input
data input
ground (0 V)
data output
supply voltage
7. Functional description
Table 4.
Input
nA
L
L
H
H
[1]
Function table
[1]
Output
nB
L
H
L
H
nY
L
L
L
H
H = HIGH voltage level; L = LOW voltage level.
74HC_HCT2G08
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 5 — 8 October 2013
3 of 15
NXP Semiconductors
74HC2G08; 74HCT2G08
Dual 2-input AND gate
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
D
[1]
[2]
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
dynamic power dissipation
Conditions
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
V
O
=
0.5
V to (V
CC
+ 0.5 V)
[1]
[1]
[1]
[1]
[1]
Min
0.5
-
-
-
-
50
65
-
Max
+7.0
20
20
25
50
-
+150
300
Unit
V
mA
mA
mA
mA
mA
C
mW
T
amb
=
40 C
to +125
C
[2]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP8 package: above 55
C
the value of P
tot
derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110
C
the value of P
tot
derates linearly with 8 mW/K.
For XSON8 package: above 118
C
the value of P
tot
derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise
and fall rate
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Conditions
Min
2.0
0
0
40
-
-
-
74HC2G08
Typ
5.0
-
-
+25
-
1.67
-
Max
6.0
V
CC
V
CC
+125
625
139
83
Min
4.5
0
0
40
-
-
-
74HCT2G08
Typ
5.0
-
-
+25
-
1.67
-
Max
5.5
V
CC
V
CC
+125
-
139
-
V
V
V
C
ns/V
ns/V
ns/V
Unit
74HC_HCT2G08
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 5 — 8 October 2013
4 of 15
NXP Semiconductors
74HC2G08; 74HCT2G08
Dual 2-input AND gate
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol
74HC2G08
V
IH
HIGH-level input
voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
IL
LOW-level input
voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
OH
HIGH-level output
voltage
V
I
= V
IH
or V
IL
I
O
=
20 A;
V
CC
= 2.0 V
I
O
=
20 A;
V
CC
= 4.5 V
I
O
=
20 A;
V
CC
= 6.0 V
I
O
=
4.0
mA; V
CC
= 4.5 V
I
O
=
5.2
mA; V
CC
= 6.0 V
V
OL
LOW-level output
voltage
V
I
= V
IH
or V
IL
I
O
= 20
A;
V
CC
= 2.0 V
I
O
= 20
A;
V
CC
= 4.5 V
I
O
= 20
A;
V
CC
= 6.0 V
I
O
= 4.0 mA; V
CC
= 4.5 V
I
O
= 5.2 mA; V
CC
= 6.0 V
I
I
I
CC
C
I
input leakage current
supply current
input capacitance
V
I
= V
CC
or GND; V
CC
= 6.0 V
per input pin; V
I
= V
CC
or GND;
I
O
= 0 A; V
CC
= 6.0 V
-
-
-
-
-
-
-
-
0
0
0
0.15
0.16
-
-
1.5
0.1
0.1
0.1
0.33
0.33
1.0
10
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
1.0
20
-
V
V
V
V
V
A
A
pF
1.9
4.4
5.9
4.13
5.63
2.0
4.5
6.0
4.32
5.81
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
1.5
3.15
4.2
-
-
-
1.2
2.4
3.2
0.8
2.1
2.8
-
-
-
0.5
1.35
1.8
1.5
3.15
4.2
-
-
-
-
-
-
0.5
1.35
1.8
V
V
V
V
V
V
Parameter
Conditions
40 C
to +85
C
Min
Typ
[1]
Max
40 C
to +125
C
Min
Max
Unit
74HC_HCT2G08
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 5 — 8 October 2013
5 of 15
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