Features
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Single Package Fully-integrated ROM Mask 4-bit Microcontroller with RF Transmitter
Low Power Consumption in Sleep Mode (< 1 µA Typically)
Maximum Output Power (10 dBm) with Low Supply Current (9.5 mA Typically)
2.0 V to 4.0 V Operation Voltage for Single Li-cell Power Supply
-40° C to +125° C Operation Temperature
SSO24 Package
About Seven External Components
Flash Controller for Application Program Available
1. Description
The ATAR862-8 is a single package triple-chip circuit. It combines a UHF ASK/FSK
transmitter with a 4-bit microcontroller and a 512-bit EEPROM. It supports highly inte-
grated solutions in car access and tire pressure monitoring applications, as well as
manifold applications in the industrial and consumer segment. It is available for the
transmitting frequency range of 868 MHz to 928 MHz with data rates up to 32 kbaud
Manchester coded.
For further frequency ranges such as 310 MHz to 330 MHz and 429 MHz to 439 MHz
separate datasheets are available.
The device contains a ROM mask version microcontroller and an additional data
EEPROM.
Microcontroller
with UHF
ASK/FSK
Transmitter
ATAR862-8
Figure 1-1.
Application Diagram
ATAR862-8
Antenna
Keys
Micro-
controller
PLL-
Transmitter
UHF ASK/FSK
Receiver
Micro-
controller
4589F–4BMCU–05/06
2. Pin Configuration
Figure 2-1.
Pinning SSO24
XTAL
VS
GND
ENABLE
NRESET
BP63/T3I
BP20/NTE
BP23
BP41/T2I/VMI
BP42/T2O
BP43/SD/INT3
VSS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
ANT1
ANT2
PA_ENABLE
CLK
BP60/T3O
OSC2
OSC1
BP50/INT6
BP52/INT1
BP53/INT1
BP40/SC/INT3
VDD
Table 2-1.
Pin
Pin Description: RF Part
Symbol
Function
Configuration
VS
1.5k
1.2k
VS
1
XTAL
Connection for crystal
XTAL
182
µA
2
3
4
VS
GND
ENABLE
Supply voltage
Ground
Enable input
ESD protection circuitry (see
Figure 7-5 on page 11)
ESD protection circuitry (see
Figure 7-5 on page 11)
ENABLE
200k
2
ATAR862-8
4589F–4BMCU–05/06
ATAR862-8
Table 2-1.
Pin
Pin Description: RF Part (Continued)
Symbol
Function
Configuration
VS
21
CLK
Clock output signal for microcontroller,
the clock output frequency is set by the
crystal to f
XTAL
/4
100
100
CLK
PA_ENABLE
50k
Uref=1.1V
22
PA_ENABLE
Switches on power amplifier, used for
ASK modulation
20 µA
ANT1
23
24
ANT2
ANT1
Emitter of antenna output stage
Open collector antenna output
ANT2
Table 2-2.
Name
V
DD
V
SS
BP20
BP40
BP41
BP42
BP43
BP50
BP52
BP53
BP60
BP63
OSC1
OSC2
NRESET
Pin Description: Microcontroller Part
Type
–
–
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
O
I/O
Function
Supply voltage
Circuit ground
Bi-directional I/O line of Port 2.0
Bi-directional I/O line of Port 4.0
Bi-directional I/O line of Port 4.1
Bi-directional I/O line of Port 4.2
Bi-directional I/O line of Port 4.3
Bi-directional I/O line of Port 5.0
Bi-directional I/O line of Port 5.2
Bi-directional I/O line of Port 5.3
Bi-directional I/O line of Port 6.0
Bi-directional I/O line of Port 6.3
Oscillator input
Oscillator output
Bi-directional reset pin
Alternate Function
–
–
NTE-test mode enable, see section
“Master Reset” on
page 23
SC-serial clock or INT3 external interrupt input
VMI voltage monitor input or T2I external clock input
Timer 2
T2O Timer 2 output
SD serial data I/O or INT3 external interrupt input
INT6 external interrupt input
INT1 external interrupt input
INT1 external interrupt input
T3O Timer 3 output
T3I Timer 3 input
4-MHz crystal input or 32-kHz crystal input or external
clock input or external trimming resistor input
4-MHz crystal output or 32-kHz crystal output or external
clock input
–
Pin-No.
13
12
7
14
9
10
11
17
16
15
20
6
18
19
5
Reset State
NA
NA
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
I/O
3
4589F–4BMCU–05/06
3. UHF ASK/FSK Transmitter Block
4. Features
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Integrated PLL Loop Filter
ESD Protection (4 kV HBM/200 V MM, Except Pin 2: 4 kV HBM/100 V MM) also at ANT1/ANT2
High Output Power (5.5 dBm) with Low Supply Current (8.5 mA Typically)
Modulation Scheme ASK/FSK
– FSK Modulation is Achieved by Connecting an Additional Capacitor between the XTAL Load
Capacitor and the Open-drain Output of the Modulating Microcontroller
Easy to Design-in Due to Excellent Isolation of the PLL from the PA and Power Supply
Single Li-cell for Power Supply
Supply Voltage 2.0 V to 4.0 V in the Temperature Range of -40° C to +85° C/+125° C
Single-ended Antenna Output with High Efficient Power Amplifier
CLK Output for Clocking the Microcontroller
One-chip Solution with Minimum External Circuitry
125° C Operation for Tire Pressure Systems
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5. Description
The PLL transmitter block has been developed for the demands of RF low-cost transmission
systems, at data rates up to 32 kbaud. The transmitting frequency range is 868 MHz to
928 MHz. It can be used in both FSK and ASK systems.
4
ATAR862-8
4589F–4BMCU–05/06
ATAR862-8
Figure 5-1.
Block Diagram
ATAR862-8
Power up/
down
CLK
f
4
f
32
ENABLE
PFD
VS
PA_ENABLE
GND
CP
ANT2
LF
ANT1
PA
PLL
VCO
XTO
XTAL
OSC2
OSC1
V DD
V SS
Microcontroller
Brown-out protect.
RESET
Voltage monitor
External input
VMI
BP10
Port 1
BP13
RC
Crystal
oscillators oscillators
External
clock input
UTCM
Timer 1
interval- and
watchdog timer
Timer 2
T2I
T2O
SD
NRESET
Clock management
ROM
4 K x 8 bit
RAM
256 x 4 bit
8-/12-bit timer
with modulator
SSI
Serial interface
SC
T3O
T3I
BP20/NTE
Data direction
4-bit CPU core
I/O bus
Timer 3
8-bit
timer/counter
with modulator
and demodulator
BP22
BP23
Port 2
BP21
Data direction +
alternate function
Port 4
Data direction +
interrupt control
Port 5
Data direction +
alternate function
Port 6
EEPROM
32 x 16 bit
BP51
INT6
BP40 BP41 BP42 BP43 BP50
INT3 VMI T2O INT3 INT6
SC T2I
SD
BP52 BP53
INT1 INT1
BP60
T3O
BP63
T3I
5
4589F–4BMCU–05/06
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