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74LVC3G07

Description
Triple buffer with open-drain output
File Size65KB,14 Pages
ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.)
Websitehttps://www.nxp.com/
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74LVC3G07 Overview

Triple buffer with open-drain output

74LVC3G07
Triple buffer with open-drain output
Rev. 03 — 01 February 2005
Product data sheet
1. General description
The 74LVC3G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device
and superior to most advanced CMOS compatible TTL families.
Input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device in a mixed 3.3 V and 5 V environment.
Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall
time.
This device is fully specified for partial power-down applications using I
off
. The I
off
circuitry
disables the output, preventing the damaging backflow current through the device when it
is powered down.
The 74LVC3G07 provides three non-inverting buffers.
The output of the device is an open drain and can be connected to other open-drain
outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
2. Features
s
s
s
s
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
x
JESD8-7 (1.65 V to 1.95 V)
x
JESD8-5 (2.3 V to 2.7 V)
x
JESD8-B/JESD36 (2.7 V to 3.6 V).
ESD protection:
x
HBM EIA/JESD22-A114-B exceeds 2000 V
x
MM EIA/JESD22-A115-A exceeds 200 V.
−24
mA output drive (V
CC
= 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
Specified from
−40 °C
to +85
°C
and
−40 °C
to +125
°C.
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74LVC3G07 Related Products

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Description Triple buffer with open-drain output Triple buffer with open-drain output Triple buffer with open-drain output Triple buffer with open-drain output
Is it Rohs certified? - conform to incompatible conform to
Maker - Philips Semiconductors (NXP Semiconductors N.V.) Philips Semiconductors (NXP Semiconductors N.V.) Philips Semiconductors (NXP Semiconductors N.V.)
package instruction - TSSOP, TSSOP8,.12,20 SON, SOLCC8,.04,20 TSSOP, TSSOP8,.16
Reach Compliance Code - unknow unknow unknow
JESD-30 code - R-PDSO-G8 R-PDSO-N8 R-PDSO-G8
Load capacitance (CL) - 50 pF 50 pF 50 pF
Logic integrated circuit type - BUFFER BUFFER BUFFER
MaximumI(ol) - 0.024 A 0.024 A 0.024 A
Number of terminals - 8 8 8
Maximum operating temperature - 125 °C 125 °C 125 °C
Minimum operating temperature - -40 °C -40 °C -40 °C
Output characteristics - OPEN-DRAIN OPEN-DRAIN OPEN-DRAIN
Package body material - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - TSSOP SON TSSOP
Encapsulate equivalent code - TSSOP8,.12,20 SOLCC8,.04,20 TSSOP8,.16
Package shape - RECTANGULAR RECTANGULAR RECTANGULAR
Package form - SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
power supply - 3.3 V 3.3 V 3.3 V
Prop。Delay @ Nom-Su - 4.7 ns 4.7 ns 4.7 ns
Certification status - Not Qualified Not Qualified Not Qualified
Schmitt trigger - NO NO NO
Nominal supply voltage (Vsup) - 3.3 V 3.3 V 3.3 V
surface mount - YES YES YES
technology - CMOS CMOS CMOS
Temperature level - AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal form - GULL WING NO LEAD GULL WING
Terminal pitch - 0.5 mm 0.5 mm 0.635 mm
Terminal location - DUAL DUAL DUAL
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