Si2457/34/15/04
V.9 0 , V.3 4, V. 3 2
B I S
, V.22
B I S
I SO
M O D E M ®
Features
Data modem formats
ITU-T, Bell
300 bps up to 56 kbps
V.21,V.22, V.29 Fast Connect
V.42, V.42bis, MNP2-5
Automatic rate negotiation
WITH
G
L O B A L
DAA
Integrated DAA
Over 6000 V Capacitive isolation
Parallel phone detect
Globally-compliant line interface
Overcurrent detection
Type I and II caller ID decode
No external ROM or RAM required
UART or parallel interface
AT command set support
SMS / MMS support
27 MHz clock input
3.3 V power
Firmware upgradeable
EEPROM interface
Lead-free, RoHS Compliant
Packages
Ordering Information
This data sheet is valid only for
those chipset combinations listed
on page page 70.
Applications
Set-top boxes
Point-of-sale terminals
Text/video telephones
Digital video recorder
Digital televisions
Remote monitoring
Pin Assignments
Description
The ISOmodem
®
family of products is a complete modem ranging in
speed from 56,000 bps to 2400 bps. Offered as a chipset with the Si2457,
Si2434, Si2415, or Si2404 system-side device and the Si3018/10 line-
side device, the ISOmodem utilizes Silicon Laboratories’ patented Direct
Access Arrangement (DAA) technology to provide a programmable
telephone line interface with an unparalleled level of integration. These
compact solutions eliminate the need for a separate DSP, modem
controller, codec, transformer, relay, opto-isolators, clocking crystal, and
2-4 wire hybrid. Available with a system-side packaging option of either a
16-pin SOIC or a 24-pin TSSOP, these devices are ideal for embedded
modem applications due to their flexibility, small footprint, and minimal
external component count.
Si2457/34/15/04
(16-Pin Option)
CLKIN/XTALI
XTALO
RI
V
D
RXD
TXD
CTS
RESET
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RTS
DCD
ESC
V
A
GND
INT
C1A
C2A
Si2457/34/15/04
(24-Pin Option)
CLKIN/XTALI
XTALO
CLKOUT/EECS/A0
FSYNC/D6
VD3.3
GND
VDA
RTS/D7
RXD/RD
TXD/WR
CTS/CS
RESET
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
SDO/EECLK/D5
DCD/D4
ESC/D3
VD3.3
GND
VDB
SDI/EESD/D2
RI/D1
INT/DO
AOUT/INT
C1A
C2A
Functional Block Diagram
CLKIN/XTALI
CLKOUT
RXD
TXD
CTS
RTS
DCD
ESC
RI
INT
CS
WR
RD
A0
D0-D7
RESET
PLL
Clocking
XTALO
RAM/ROM
Data Bus
Si3018/10
QE
DCT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
DCT2
IGND
DCT3
QB
QE2
SC
VREG2
RNG2
Serial
Interface
DAA
Interface
Si3018/10
To Phone Line
RX
IB
C1B
C2B
VREG
RNG1
Microcontroller
DSP
AOUT
Parallel
Interface
ISOB
Rev. 1.0 2/05
Copyright © 2005 by Silicon Laboratories
Si2457/34/15/04
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Si2457/34/15/04
2
Rev. 1.0
Si2457/34/15/04
T
A B L E O F
C
O N T E N TS
Section
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3. Bill of Materials: Si2457/34/15/04 Chipset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.1. Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.2. Parallel Interface (24-Pin Version Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.3. Command Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
4.4. Data Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.5. Fast Connect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
4.6. V.80 Synchronous Access Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.7. Clocking/Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.8. Data Compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.9. Error Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
4.10. Wire Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
4.11. Caller ID Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
4.12. Parallel Phone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.13. Overcurrent Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.14. Global Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.15. Firmware Upgrades . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
4.16. SMS / MMS Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.17. Codec Interface (24-Pin Version Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.18. EEPROM Interface (24-Pin Version Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
4.19. AT Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
4.20. Extended AT Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5. S-Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6. User-Access Registers (U-Registers) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
6.1. Bit-Mapped U-Register Detail (defaults in bold) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
7. Parallel Interface Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64
8. Pin Descriptions: Si2457/34/15/04 (16-Pin Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
9. Pin Descriptions: Si2457/34/15/04 (24-Pin Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
10. Pin Descriptions: Si3018/10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
11. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
12. Package Outline: 24-Pin TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
13. Package Outline: 16-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74
Rev. 1.0
3
Si2457/34/15/04
1. Electrical Specifications
Table 1. Recommended Operating Conditions
Parameter
1
Ambient Temperature
Si2457/34/15/04 Supply Voltage,
Digital
3
Symbol
T
A
V
D
Test Condition
F-Grade
Min
2
0
3.0
Typ
25
3.3
Max
2
70
3.6
Unit
°C
V
Notes:
1.
The Si2457/34/15/04 specifications are guaranteed when the typical application circuit (including component tolerance)
and any Si2457/34/15/04 and any Si3018 are used. See "2. Typical Application Schematic" on page 10.
2.
All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions.
Typical values apply at nominal supply voltages and an operating temperature of 25 °C unless otherwise stated.
3.
The digital supply, V
D
, operates from 3.0 to 3.6 V. The Si2457/34/15/04 interface supports 5 V logic (CLKIN/XTALI
supports 3.3 V logic only).
Table 2. Loop Characteristics
(V
D
=
3.0 to 3.6 V, T
A
=
0 to 70 °C for F-Grade)
Parameter
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
On-Hook Leakage Current
Operating Loop Current
Operating Loop Current
DC Ring Current
Ring Detect Voltage
2
Ring Detect Voltage
2
Ring Frequency
Ringer Equivalence Number
Symbol
V
TR
V
TR
V
TR
V
TR
V
TR
V
TR
V
TR
I
LK
I
LP
I
LP
Test Condition
I
L
= 20 mA, ILIM
1
= 0
DCV = 00, MINI = 11, DCR = 0
I
L
= 120 mA, ILIM = 0
DCV = 00, MINI = 11, DCR = 0
I
L
= 20 mA, ILIM = 0
DCV = 11, MINI = 00, DCR = 0
I
L
= 120 mA, ILIM = 0
DCV = 11, MINI = 00, DCR = 0
I
L
= 20 mA, ILIM = 1
DCV = 11, MINI = 00, DCR = 0
I
L
= 60 mA, ILIM = 1
DCV = 11, MINI = 00, DCR = 0
I
L
= 50 mA, ILIM = 1
DCV = 11, MINI = 00, DCR = 0
V
TR
= –48 V
MINI = 00, ILIM = 0
MINI = 00, ILIM = 1
DC current flowing through ring
detection circuitry
RT = 0
RT = 1
Min
—
9
—
9
—
40
—
—
10
10
—
12
18
15
—
Typ
—
—
—
—
—
—
—
—
—
—
1.5
15
21
—
—
Max
6.0
—
7.5
—
7.5
—
40
5
120
60
3
18
25
68
0.2
Unit
V
V
V
V
V
V
V
µA
mA
mA
µA
V
RMS
V
RMS
Hz
V
RD
V
RD
F
R
REN
Notes:
1.
ILIM = U67, bit 9; DCV = U67, bits 3:2; MINI = U67, bits 13:12; DCR = U67, bit 7; RT = U67, bit 0.
2.
The ring signal is guaranteed to not be detected below the minimum. The ring signal is guaranteed to be detected
above the maximum.
4
Rev. 1.0
Si2457/34/15/04
TIP
+
600
Ω
Si3018
V
TR
10 µF
–
I
L
RING
Figure 1. Test Circuit for Loop Characteristics
Table 3. DC Characteristics, V
D
= 3.0 to 3.6 V
(V
D
= 3.0 to 3.6 V, T
A
= 0 to 70 °C for F-Grade)
Parameter
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
Low Level Output Voltage
Input Leakage Current
Pullup Resistance Pins 3, 4, 9, 11,
15, 16, 17, 18, 23, 24 (24-pin option)
Pullup Resistance Pins 3, 5, 7, 9,11,
15, 16 (16-pin option)
Total Supply Current
*
Total Supply Current, Powerdown
*
Symbol
V
IH
V
IL
V
OH
V
OL
I
L
R
PU
R
PU
I
D
I
D
Test Condition
Min
2.0
—
Typ
—
—
—
—
—
125
125
26
80
Max
—
0.8
—
0.35
10
200
200
35
—
Unit
V
V
V
V
µA
kΩ
kΩ
mA
µA
I
O
= –2 mA
I
O
= 2 mA
2.4
—
–10
50
50
V
D3.3
pin
PDN = 1
—
—
*Note:
All inputs at 0 or V
D
. All inputs held static except clock and all outputs unloaded (Static I
OUT
= 0 mA).
Rev. 1.0
5
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