MT90869 datasheet, PDF - EEWORLD Datasheet

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MT90869: DescriptionFlexible 16K Digital Switch (F16kDX); File Size676KB，76 Pages; ManufacturerZarlink Semiconductor (Microsemi); Websitehttp://www.zarlink.com/

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MT90869 Overview

Flexible 16K Digital Switch (F16kDX)

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MT90869

Flexible 16K Digital Switch (F16kDX)

Data Sheet

Features

•

16,384-channel x 16,384-channel non-blocking

unidirectional switching.The Backplane and

Local inputs and outputs can be combined to

form a non-blocking switching matrix with 64

stream inputs and 64 stream outputs.

8,192-channel x 8,192-channel non-blocking

Backplane to Local stream switch.

8,192-channel x 8,192-channel non-blocking

Local to Backplane stream switch.

8,192-channel x 8,192-channel non-blocking

Backplane input to Backplane output switch.

8,192-channel x 8,192-channel non-blocking

Local input to Local output stream switch.

Rate conversion on all data paths, Backplane to

Local, Local to Backplane, Backplane to

Backplane and Local to Local streams.

Backplane port accepts 32 ST-BUS streams

with data rates of 2.048Mb/s, 4.096Mb/s,

8.192Mb/s or 16.384Mb/s in any combination,

or a fixed allocation of 16 streams at

32.768Mb/s.

Local port accepts 32 ST-BUS streams with

data rates of 2.048Mb/s, 4.096Mb/s, 8.192Mb/s

DD_IO

DD_CORE

December 2002

Ordering Information

MT90869AG

272 Ball - PBGA

-40 to +85

•

or 16.384Mb/s, in any combination.

Per-stream channel and bit delay for Local input

streams.

Per-stream channel and bit delay for Backplane

input streams.

Per-stream advancement for Local output

streams.

Per-stream advancement for Backplane output

streams.

Constant throughput delay for frame integrity.

Per-channel high impedance output control for

Local and Backplane streams.

Per-channel driven-high output control for local

and backplane streams.

High impedance-control outputs for external

drivers on backplane and local port.

RESET

ODE

SS (GND)

BSTi0-31

Backplane Data Memories

(8,192 channels)

Local

Interface

LSTi0-31

Backplane

Interface

BSTo0-31

BCST0-3

BORS

Backplane

Connection Memory

(8,192 locations)

Local

Connection Memory

(8,192 locations)

Local

Interface

LSTo0-31

LCST0-3

Local Data Memories

(8,192 channels)

Backplane

Timing Unit

LORS

FP8i

Local

Timing

Unit

Microprocessor Interface

and Internal Registers

FP8o

FP16o

C8o

C16o

PLL

C8i

Test Port

DD_PLL

DS CS R/W A14-A0 DTA D15-D0

TMS TDi TDo TCK TRST

Figure 1 - MT90869 Functional Block Diagram

Zarlink Semiconductor Inc.

MT90869

•

Per-channel message mode for local and backplane output streams.

Connection memory block programming for fast device initialization.

BER testing for local and backplane ports.

Automatic selection between ST-BUS and GCI-BUS operation.

Non-multiplexed Motorola microprocessor interface.

Conforms to the mandatory requirements of the IEEE-1149.1 (JTAG) standard.

Memory Built-In-Self-Test (BIST), controlled via microprocessor registers.

1.8V core supply voltage.

3.3V I/O supply voltage.

5V tolerant inputs, outputs and I/Os.

Per stream subrate switching at 4 bit, 2 bit and 1 bit depending on stream data rate.

Data Sheet

Applications

•

Central Office Switches (Class 5)

Mediation Switches

Class-independent switches

Access Concentrators

Scalable TDM-Based Architectures

Digital Loop Carriers

Device Overview

The MT90869 has two data ports, the Backplane and the Local port. The Backplane port has two modes of

operation, either 32 input and 32 output streams operated at 2.048Mb/s, 4.096Mb/s, 8.192Mb/s or 16.384Mb/s, in

any combination, or 16 input and 16 output streams operated at 32.768Mb/s. The Local port has 32 input and 32

output streams operated at 2.048Mb/s, 4.096Mb/s, 8.192Mb/s or 16.384Mb/s, in any combination.

The MT90869 contains two data memory blocks (Backplane and Local) to provide the following switching path

configurations:

• Backplane-to-Local, supporting 8K x 8K data switching,

• Local-to-Backplane, supporting 8K x 8K data switching,

• Backplane-to-Backplane, supporting 8K x 8K data switching.

• Local-to-Local, supporting 8K x 8K data switching.

The device contains two connection memory blocks, one for the Backplane output and one for the Local output. Data

to be output on the serial streams may come from either of the data memories (Connection Mode) or directly from

the connection memory contents (Message Mode).

In Connection Mode the contents of the connection memory defines, for each output stream and channel, the source

stream and channel (stored in data memory) to be switched.

In Message Mode, microprocessor data can be written to the connection memory for broadcast on the output

streams on a per channel basis. This feature is useful for transferring control and status information to external

circuits or other ST-BUS devices.

The device uses a master frame pulse (FP8i) and master clock (C8i) to define the frame boundary and timing for

both the backplane port and the local port. The device will automatically detect whether an ST-BUS or a GCI-BUS

style frame pulse is being used. There is a two frame delay from the time RESET is de-asserted to the establishment

of full switch functionality. During this period the frame format is determined before switching begins.

The device provides FP8o, FP16o, C8o and C16o outputs to support external devices connected to the local port.

Zarlink Semiconductor Inc.

MT90869 Related Products

	MT90869	MT90869AG
Description	Flexible 16K Digital Switch (F16kDX)	Flexible 16K Digital Switch (F16kDX)

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