DSPIC33EP64GP504-I/TL datasheet, PDF

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DSPIC33EP64GP504-I/TL: Descriptiondigital signal processors & controllers - dsp, dsc 16b dsc 64kbfl 8kbrm 60mhz 44p ptg ctmu; CategoryThe embedded processor and controller Microcontrollers and processors; File Size5MB，511 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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DSPIC33EP64GP504-I/TL Overview

digital signal processors & controllers - dsp, dsc 16b dsc 64kbfl 8kbrm 60mhz 44p ptg ctmu

DSPIC33EP64GP504-I/TL Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Microchip
Parts packaging code	QFN
package instruction	VTLA-44
Contacts	44
Reach Compliance Code	compliant
ECCN code	3A991.A.2
Factory Lead Time	22 weeks
Has ADC	YES
Address bus width
bit size	16
maximum clock frequency	60 MHz
DAC channel	NO
DMA channel	YES
External data bus width
Format	FLOATING POINT
JESD-30 code	S-XQCC-N44
JESD-609 code	e4
length	6 mm
Number of I/O lines	35
Number of terminals	44
On-chip program ROM width	24
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC44,.24SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Certification status	Not Qualified
RAM (bytes)	8192
RAM (number of words)	4096
rom(word)	21845
ROM programmability	FLASH
Maximum seat height	1 mm
speed	70 MHz
Maximum slew rate	150 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	6 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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dsPIC33EPXXXGP50X,

dsPIC33EPXXXMC20X/50X, and

PIC24EPXXXGP/MC20X

16-bit Microcontrollers and Digital Signal Controllers (up to 512 KB Flash

and 48 KB SRAM) with High-Speed PWM, Op amps, and Advanced Analog

Operating Conditions

• 3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS

•

3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS

Timers/Output Compare/Input Capture

• 12 general purpose timers:

- Five 16-bit and up to two 32-bit timers/counters

- Four OC modules configurable as timers/counters

- PTG module with two configurable timers/counters

- 32-bit Quadrature Encoder Interface (QEI) module

configurable as a timer/counter

• Four IC modules

• Peripheral Pin Select (PPS) to allow function remap

• Peripheral Trigger Generator (PTG) for scheduling

complex sequences

Core: 16-bit dsPIC33E/PIC24E CPU

•

Code-efficient (C and Assembly) architecture

Two 40-bit wide accumulators

Single-cycle (MAC/MPY) with dual data fetch

Single-cycle mixed-sign MUL plus hardware divide

32-bit multiply support

0.9% internal oscillator

Programmable PLLs and oscillator clock sources

Fail-Safe Clock Monitor (FSCM)

Independent Watchdog Timer (WDT)

Fast wake-up and start-up

Low-power management modes (Sleep, Idle, Doze)

Integrated Power-on Reset and Brown-out Reset

0.6 mA/MHz dynamic current (typical)

30 µA I

current (typical)

Clock Management

Communication Interfaces

• Two UART modules (17.5 Mbps)

- With support for LIN 2.0 protocols and IrDA

• Two 4-wire SPI modules (15 Mbps)

• ECAN™ module (1 Mbaud) CAN 2.0B support

• Two I

C™ modules (up to 1 Mbaud) with SMBus

support

• PPS to allow function remap

• Programmable Cyclic Redundancy Check (CRC)

Power Management

Direct Memory Access (DMA)

• 4-channel DMA with user-selectable priority arbitration

• UART, SPI, ADC, ECAN, IC, OC, and Timers

High-Speed PWM

Up to three PWM pairs with independent timing

Dead time for rising and falling edges

7.14 ns PWM resolution

PWM support for:

- DC/DC, AC/DC, Inverters, PFC, Lighting

- BLDC, PMSM, ACIM, SRM

• Programmable Fault inputs

• Flexible trigger configurations for ADC conversions

Input/Output

• Sink/Source 15 mA or 10 mA, pin-specific for

standard VOH/VOL, up to 22 or 14 mA, respectively

for non-standard VOH1

• 5V-tolerant pins

• Selectable open drain, pull-ups, and pull-downs

• Up to 5 mA overvoltage clamp current

• External interrupts on all I/O pins

Advanced Analog Features

• ADC module:

- Configurable as 10-bit, 1.1 Msps with four S&H or

12-bit, 500 ksps with one S&H

- Six analog inputs on 28-pin devices and up to 16

analog inputs on 64-pin devices

• Flexible and independent ADC trigger sources

• Up to three Op amp/Comparators with direct connection

to the ADC module:

- Additional dedicated comparator

- Programmable references with 32 voltage points

• Charge Time Measurement Unit (CTMU):

- Supports mTouch™ capacitive touch sensing

- Provides high-resolution time measurement (1 ns)

- On-chip temperature measurement

Qualification and Class B Support

• AEC-Q100 REVG (Grade 1 -40ºC to +125ºC) planned

• AEC-Q100 REVG (Grade 0 -40ºC to +150ºC) planned

• Class B Safety Library, IEC 60730

Debugger Development Support

•

In-circuit and in-application programming

Two program and two complex data breakpoints

IEEE 1149.2-compatible (JTAG) boundary scan

Trace and run-time watch

Packages

Type

SPDIP

SOIC

SSOP

Pin Count

I/O Pins

Contact Lead/Pitch

.100''

1.27

0.65

Dimensions

1.365x.240x.120'' 17.9x7.50x2.05 10.50x7.80x2

Note:

All dimensions are in millimeters (mm) unless specified.

QFN-S

0.65

6x6x0.9

QFN

0.65

0.50

8x8x0.9 9x9x.9

VTLA

TQFP

0.50

5x5x0.5 6x6x0.5

0.50

10x10x1

2011-2012 Microchip Technology Inc.

Preliminary

DS70657E-page 1

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