CD54HCT08F datasheet, PDF - EEWORLD Datasheet

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CD54HCT08F: DescriptionHigh Speed CMOS Logic Quad 2-Input AND Gates 14-CDIP -55 to 125; Categorylogic logic; File Size1MB，20 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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CD54HCT08F Overview

High Speed CMOS Logic Quad 2-Input AND Gates 14-CDIP -55 to 125

CD54HCT08F Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Lead free
Is it Rohs certified?	incompatible
Maker	Texas Instruments
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	not_compliant
ECCN code	EAR99
Factory Lead Time	6 weeks
Samacsys Description	High-Speed CMOS Logic
series	HCT
JESD-30 code	R-GDIP-T14
JESD-609 code	e0
length	19.56 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	AND GATE
MaximumI(ol)	0.004 A
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
method of packing	TUBE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Maximum supply current (ICC)	0.04 mA
Prop。Delay @ Nom-Sup	38 ns
propagation delay (tpd)	38 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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Description	High Speed CMOS Logic Quad 2-Input AND Gates 14-CDIP -55 to 125	High Speed CMOS Logic Quad 2-Input AND Gates 14-TSSOP -55 to 125	High Speed CMOS Logic Quad 2-Input AND Gates 14-CDIP -55 to 125	High Speed CMOS Logic Quad 2-Input AND Gates 14-CDIP -55 to 125	High Speed CMOS Logic Quad 2-Input AND Gates 14-CDIP -55 to 125	High Speed CMOS Logic Quad 2-Input AND Gates 14-CDIP -55 to 125	CD54HC08 High Speed CMOS Logic Quad 2-Input AND Gates	CD54HCT08 High Speed CMOS Logic Quad 2-Input AND Gates	CD74HC08 High Speed CMOS Logic Quad 2-Input AND Gates	CD74HCT08 High Speed CMOS Logic Quad 2-Input AND Gates
Brand Name	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	-	-	-	-
Parts packaging code	DIP	TSSOP	DIP	DIP	DIP	DIP	-	-	-	-
package instruction	DIP, DIP14,.3	TSSOP, TSSOP14,.25	DIP, DIP14,.3	DIP, DIP14,.3	DIP, DIP14,.3	DIP, DIP14,.3	-	-	-	-
Contacts	14	14	14	14	14	14	-	-	-	-
Reach Compliance Code	not_compliant	compliant	not_compliant	not_compliant	not_compliant	not_compliant	-	-	-	-
series	HCT	HC/UH	HCT	HC/UH	HC	HCT	-	-	-	-
JESD-30 code	R-GDIP-T14	R-PDSO-G14	R-GDIP-T14	R-GDIP-T14	R-GDIP-T14	R-GDIP-T14	-	-	-	-
length	19.56 mm	5 mm	19.56 mm	19.56 mm	19.56 mm	19.56 mm	-	-	-	-
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	-	-	-	-
Logic integrated circuit type	AND GATE	AND GATE	AND GATE	AND GATE	AND GATE	AND GATE	-	-	-	-
MaximumI(ol)	0.004 A	0.004 A	0.004 A	0.0052 A	0.0052 A	0.004 A	-	-	-	-
Number of functions	4	4	4	4	4	4	-	-	-	-
Number of entries	2	2	2	2	2	2	-	-	-	-
Number of terminals	14	14	14	14	14	14	-	-	-	-
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	-	-	-	-
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-	-	-	-
Package body material	CERAMIC, GLASS-SEALED	PLASTIC/EPOXY	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	-	-	-	-
encapsulated code	DIP	TSSOP	DIP	DIP	DIP	DIP	-	-	-	-
Encapsulate equivalent code	DIP14,.3	TSSOP14,.25	DIP14,.3	DIP14,.3	DIP14,.3	DIP14,.3	-	-	-	-
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	-	-	-	-
Package form	IN-LINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	IN-LINE	IN-LINE	IN-LINE	IN-LINE	-	-	-	-
method of packing	TUBE	TUBE	TUBE	TUBE	TUBE	TUBE	-	-	-	-
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	260	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-	-	-	-
power supply	5 V	2/6 V	5 V	2/6 V	2/6 V	5 V	-	-	-	-
Prop。Delay @ Nom-Sup	38 ns	27 ns	41 ns	27 ns	27 ns	38 ns	-	-	-	-
propagation delay (tpd)	38 ns	135 ns	135 ns	135 ns	135 ns	38 ns	-	-	-	-
Certification status	Not Qualified	Not Qualified	Qualified	Not Qualified	Not Qualified	Not Qualified	-	-	-	-
Schmitt trigger	NO	NO	NO	NO	NO	NO	-	-	-	-
Maximum seat height	5.08 mm	1.2 mm	5.08 mm	5.08 mm	5.08 mm	5.08 mm	-	-	-	-
Maximum supply voltage (Vsup)	5.5 V	6 V	5.5 V	6 V	6 V	5.5 V	-	-	-	-
Minimum supply voltage (Vsup)	4.5 V	2 V	4.5 V	2 V	2 V	4.5 V	-	-	-	-
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	-	-	-	-
surface mount	NO	YES	NO	NO	NO	NO	-	-	-	-
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	-	-	-	-
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	-	-	-	-
Terminal form	THROUGH-HOLE	GULL WING	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	-	-	-	-
Terminal pitch	2.54 mm	0.65 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	-	-	-	-
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	-	-	-	-
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-	-	-	-
width	7.62 mm	4.4 mm	6.67 mm	6.67 mm	7.62 mm	7.62 mm	-	-	-	-

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