LD8752BH datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> LD8752BH

LD8752BH: Description8-BIT, UVPROM, MICROCONTROLLER, CDIP40; CategoryThe embedded processor and controller Microcontrollers and processors; File Size714KB，21 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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LD8752BH Overview

8-BIT, UVPROM, MICROCONTROLLER, CDIP40

LD8752BH Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Intel
Parts packaging code	DIP
package instruction	DIP, DIP40,.6
Contacts	40
Reach Compliance Code	compliant
Has ADC	NO
Other features	BOOLEAN PROCESSOR
Address bus width	16
bit size	8
boundary scan	NO
CPU series	8051
maximum clock frequency	12 MHz
DAC channel	NO
DMA channel	NO
External data bus width	8
Format	FIXED POINT
Integrated cache	NO
JESD-30 code	R-GDIP-T40
JESD-609 code	e0
length	52.325 mm
low power mode	NO
Number of DMA channels
Number of external interrupt devices	2
Number of I/O lines	32
Number of serial I/Os	1
Number of terminals	40
Number of timers	3
On-chip data RAM width	8
On-chip program ROM width	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	NO
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP40,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
RAM (bytes)	256
RAM (number of words)	256
rom(word)	8192
ROM programmability	UVPROM
Maximum seat height	5.72 mm
speed	6 MHz
Maximum slew rate	175 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	NMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15.24 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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mu @

MCS@51

8-BIT CONTROL-ORIENTED MICROCONTROLLERS

Commercial/Express

8031AH18051AH18051AHP

8032N+18052N-I

8751W8751H-8

8751BW8752BI-I

High Performance HMOS Process

Internal Timers/Event Counters

2-Level interrupt Priority Structure

32 1/0 Lines (Four 8-Bit Ports)

64K External Program Memory Space

Security Feature Protects EPROM Parts

Boolean Processor

Bit-Addressable RAM

Programmable Full Duplex Serial

Channel

111 Instructions

(64

Single-Cycle)

Extended Temperature Range

64K External Data Memory Space

(–40”C to +85”C)

Against Software Piracy

The MCS@51 controllers are optimized for control applications. Byte-processing and numerical operations on

small data structures are facilitated by a variety of fast addressing modes for accessing the internal RAM. The

instruction set provides a convenient menu of 8-bit arithmetic instructions, including multiply and divide instruc-

tions. Extensive on-chip support is provided for one-bit variables as a separate data type, allowing direct bit

manipulation and testing in control and logic systems that require Boolean processing.

The 8751H is an EPROM version of the 8051AH. It has 4 Kbytes of electrically programmable ROM which can

be erased with ultraviolet light. His fully compatible with the 8051AH but incorporates one additional feature: a

Program Memory Security bit that can be used to protect the EPROM against unauthorized readout. The

8751 H-8 is identical to the 8751 H but only operates up to 8 MHz.

The 8051AHP is identical to the 8051AH with the exception of the Protection Feature. To incorporate this

Protection Feature, program verification has been disabled and external memory accesses have been limited

to 4K.

The 8052AH is an enhanced version of the 8051AH. It is backwards compatible with the 8051AH and is

fabricated with HMOS II technology. The 8052AH enhancements are listed in the table below. Also refer to this

table for the ROM, ROMless and-EPROM versions of each product.

Device

8031AH

8051AH

6051AHP

8751 H

8751 H-8

6751 BH

8032AH

6052AH

8752BH

Intsrnal Memory

Program

none

8 ROM

6 ROM

8 EPROM

none

8 ROM

8 EPROM

Data

128

8 RAM

128

8 RAM

128

8 RAM

128

8 RAM

128

6 RAM

128

8 RAM

256

6 RAM

256

8 RAM

256

8 RAM

Timera/

Event Counters

2 x 18-Bit

2 x 16-Bit

3 x 16-Bit

Interrupts

Intel Corporationassumes no responsibility the use of any circuit~ other than circuitryembodied in an Intel product.No other circuitpatent

for

licenses are implied.Informationcontained herein supersedes previouslypublishedspecificationson theaa davices from Intel.

O INTEL CORPORATION, 1994

October 1994

Order Numben 272318-002

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