5962-8971501YA datasheet, PDF - EEWORLD Datasheet

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5962-8971501YA: DescriptionVideo Imager, 12-Bit, CMOS, CQFP68, HERMETIC SEALED, CERAMIC, CC-68; CategoryThe embedded processor and controller Microcontrollers and processors; File Size143KB，17 Pages; ManufacturerRaytheon Company; Websitehttps://www.raytheon.com/

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5962-8971501YA Overview

Video Imager, 12-Bit, CMOS, CQFP68, HERMETIC SEALED, CERAMIC, CC-68

5962-8971501YA Parametric

Parameter Name	Attribute value
package instruction	HERMETIC SEALED, CERAMIC, CC-68
Reach Compliance Code	unknown
Other features	12 BIT SOURCE ADDRESS; OPTEMP SPECIFIED AS TC
boundary scan	NO
maximum clock frequency	15.15 MHz
External data bus width	12
JESD-30 code	S-CQFP-F68
JESD-609 code	e0
length	24.195 mm
low power mode	NO
Number of terminals	68
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output data bus width	12
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QFF
Package shape	SQUARE
Package form	FLATPACK
Certification status	Not Qualified
Maximum seat height	2.92 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	FLAT
Terminal pitch	1.27 mm
Terminal location	QUAD
width	24.195 mm
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, VIDEO IMAGING
Base Number Matches	1

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REVISIONS

LTR

DESCRIPTION

Change in accordance with NOR 5962-R076-96.

Add device type 03. Update boilerplate. Editorial changes throughout.- tvn

DATE (YR-MO-DA)

96-04-11

98-09-18

APPROVED

Monica L. Poelking

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

PMIC N/A

REV

SHEET

PREPARED BY

Jeffery Tunstall

CHECKED BY

Thomas M. Hess

APPROVED BY

Monica L. Poelking

STANDARD

MICROCIRCUIT

DRAWING

THIS DRAWING IS AVAILABLE

FOR USE BY ALL

DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

AMSC N/A

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216

DRAWING APPROVAL DATE

92-02-12

REVISION LEVEL

MICROCIRCUIT, DIGITAL, CMOS, IMAGE RESAMPLING

SEQUENCER, MONOLITHIC SILICON

SIZE

CAGE CODE

SHEET

67268

5962-89715

DSCC FORM 2233

APR 97

DISTRIBUTION STATEMENT A Approved for public release; distribution is unlimited.

5962-E493-98

1.4 Recommended operating conditions.

Supply voltage (V

) ................................................................................. +4.5 V dc to +5.5 V dc

Input high voltage (V

) ............................................................................. 2.0 V dc minimum

Input low voltage (V

) ............................................................................... 0.8 V maximum

Output high current (I

) ........................................................................... -4.0 mA maximum

Output low current (I

) ............................................................................. 6.0 mA maximum

Case operating temperature range (T

) .................................................... -55

C to +125

Clock pulse width low (t

PWL

Device type 01 ....................................................................................... 25 ns minimum

Device types 02 and 03 ......................................................................... 22 ns minimum

Clock pulse width high (t

PWH

Device type 01 ....................................................................................... 33 ns minimum

Device types 02 and 03 ......................................................................... 28 ns minimum

Input setup time (t

Device type 01 ....................................................................................... 20 ns minimum

Device types 02 and 03 ......................................................................... 18 ns minimum

Input hold time (t

) .................................................................................... 2 ns minimum

Input hold time, INTER .............................................................................. 10 ns minimum

2. APPLICABLE DOCUMENTS

2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a

part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed

in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in

the solicitation.

SPECIFICATION

DEPARTMENT OF DEFENSE

MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.

STANDARDS

DEPARTMENT OF DEFENSE

MIL-STD-883 -

MIL-STD-973 -

MIL-STD-1835 -

HANDBOOKS

DEPARTMENT OF DEFENSE

MIL-HDBK-103 -

MIL-HDBK-780 -

List of Standard Microcircuit Drawings (SMD's).

Standard Microcircuit Drawings.

Test Method Standard Microcircuits.

Configuration Management.

Interface Standard For Microcircuit Case Outlines.

(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization

Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)

2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text

of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a

specific exemption has been obtained.

STANDARD

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216-5000

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-89715

SHEET

3. REQUIREMENTS

3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-

JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer

Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-

PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying

activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan

may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device.

These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-

PRF-38535 is required to identify when the QML flow option is used.

3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as

specified in MIL-PRF-38535, appendix A and herein.

3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein.

3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.

3.2.3 Block diagram. The block diagram shall be as specified on figure 2.

3.2.4. Image resampling geometry showing image rotation and expansion. Image resampling geometry showing image

rotation and expansion shall be as specified on figure 3.

3.2.5 Waveforms and test circuit. The waveforms and test circuit are as specified on figure 4.

3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are

as specified in table I and shall apply over the full case operating temperature range.

3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical

tests for each subgroup are described in table I.

3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN

listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). For

packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the

option of not marking the "5962-" on the device.

3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an

approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to

listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of

MIL-PRF-38535,

appendix A

and the requirements herein.

3.7 Certificate of conformance. A certificate of conformance as required in

MIL-PRF-38535, appendix A

shall be provided with

each lot of microcircuits delivered to this drawing.

3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-PRF-38535,

appendix A.

3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's

facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the

reviewer.

STANDARD

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216-5000

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-89715

SHEET

4. QUALITY ASSURANCE PROVISIONS

4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,

appendix A.

4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices

prior to quality conformance inspection. The following additional criteria shall apply:

Burn-in test, method 1015 of MIL-STD-883.

(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision

level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall

specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in

test method 1015 of MIL-STD-883.

(2) T

= +125

C, minimum.

Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter

tests prior to burn-in are optional at the discretion of the manufacturer.

4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of

MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply.

4.3.1 Group A inspection.

Tests shall be as specified in table II herein.

Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.

Subgroup 4 (C

and C

OUT

measurements) shall be measured only for the initial test and after process or design

changes which may affect input capacitance. A minimum sample size of five devices with zero rejects shall be

required.

Subgroups 7 and 8 tests shall consist of verifying the function of the device. These tests form a part of the vendor's

test tape and shall be maintained and available for review from the approved sources of supply.

4.3.2 Groups C and D inspections.

End-point electrical parameters shall be as specified in table II herein.

Steady-state life test conditions, method 1005 of MIL-STD-883.

(1)

Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision

level control and shall be made available to the preparing or acquiring activity upon request. The test circuit

shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent

specified in test method 1005 of MIL-STD-883.

= +125

C, minimum.

Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.

(2)

(3)

STANDARD

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216-5000

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-89715

SHEET

5962-8971501YA Related Products

	5962-8971501YA	5962-8971501XC	5962-8971502YA	5962-8971502XC	5962-8971501YX	5962-8971502XX	5962-8971501XX	5962-8971502YX
Description	Video Imager, 12-Bit, CMOS, CQFP68, HERMETIC SEALED, CERAMIC, CC-68	Video Imager, 12-Bit, CMOS, CPGA68,	Video Imager, 12-Bit, CMOS, CQFP68, HERMETIC SEALED, CERAMIC, CC-68	Video Imager, 12-Bit, CMOS, CPGA68,	Video Imager, 12-Bit, CMOS, CQFP68, HERMETIC SEALED, CERAMIC, CC-68	Video Imager, 12-Bit, CMOS, CPGA68,	Video Imager, 12-Bit, CMOS, CPGA68,	Video Imager, 12-Bit, CMOS, CQFP68, HERMETIC SEALED, CERAMIC, CC-68
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
Other features	12 BIT SOURCE ADDRESS; OPTEMP SPECIFIED AS TC	12 BIT SOURCE ADDRESS; OPTEMP SPECIFIED AS TC	12 BIT SOURCE ADDRESS; OPTEMP SPECIFIED AS TC; ICC SPECIFIED @ 15MHZ	12 BIT SOURCE ADDRESS; OPTEMP SPECIFIED AS TC; ICC SPECIFIED @ 15MHZ	12 BIT SOURCE ADDRESS; OPTEMP SPECIFIED AS TC	12 BIT SOURCE ADDRESS; OPTEMP SPECIFIED AS TC; ICC SPECIFIED @ 15MHZ	12 BIT SOURCE ADDRESS; OPTEMP SPECIFIED AS TC	12 BIT SOURCE ADDRESS; OPTEMP SPECIFIED AS TC; ICC SPECIFIED @ 15MHZ
boundary scan	NO	NO	NO	NO	NO	NO	NO	NO
External data bus width	12	12	12	12	12	12	12	12
JESD-30 code	S-CQFP-F68	S-CPGA-P68	S-CQFP-F68	S-CPGA-P68	S-CQFP-F68	S-CPGA-P68	S-CPGA-P68	S-CQFP-F68
JESD-609 code	e0	e4	e0	e4	e0	e4	e4	e0
low power mode	NO	NO	NO	NO	NO	NO	NO	NO
Number of terminals	68	68	68	68	68	68	68	68
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C
Output data bus width	12	12	12	12	12	12	12	12
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	FLATPACK	GRID ARRAY	FLATPACK	GRID ARRAY	FLATPACK	GRID ARRAY	GRID ARRAY	FLATPACK
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	NO	YES	NO	YES	NO	NO	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY
Terminal surface	TIN LEAD	GOLD	TIN LEAD	GOLD	TIN LEAD	GOLD	GOLD	TIN LEAD
Terminal form	FLAT	PIN/PEG	FLAT	PIN/PEG	FLAT	PIN/PEG	PIN/PEG	FLAT
Terminal location	QUAD	PERPENDICULAR	QUAD	PERPENDICULAR	QUAD	PERPENDICULAR	PERPENDICULAR	QUAD
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, VIDEO IMAGING	DSP PERIPHERAL, VIDEO IMAGING	DSP PERIPHERAL, VIDEO IMAGING	DSP PERIPHERAL, VIDEO IMAGING	DSP PERIPHERAL, VIDEO IMAGING	DSP PERIPHERAL, VIDEO IMAGING	DSP PERIPHERAL, VIDEO IMAGING	DSP PERIPHERAL, VIDEO IMAGING
Base Number Matches	1	1	1	1	1	1	1	1

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