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5962-88670023X

Description
OT PLD, 30ns, CMOS, CQCC28,
CategoryProgrammable logic devices    Programmable logic   
File Size233KB,14 Pages
ManufacturerMonolithic Memories
Download Datasheet Parametric Compare View All

5962-88670023X Overview

OT PLD, 30ns, CMOS, CQCC28,

5962-88670023X Parametric

Parameter NameAttribute value
Reach Compliance Codeunknown
Other features10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS
maximum clock frequency25 MHz
JESD-30 codeS-CQCC-N28
length11.43 mm
Dedicated input times11
Number of I/O lines10
Number of terminals28
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize11 DEDICATED INPUTS, 10 I/O
Output functionMACROCELL
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeQCCN
Package shapeSQUARE
Package formCHIP CARRIER
Programmable logic typeOT PLD
propagation delay30 ns
Certification statusNot Qualified
Maximum seat height1.9812 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal formNO LEAD
Terminal pitch1.27 mm
Terminal locationQUAD
width11.43 mm
Base Number Matches1
REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
Add CAGE number 50364 as a supplier for 02 and 03 device types.
Add 04 device type. Add CAGE number 1FN41 as a supplier of the K
package. Editorial changes throughout entire document. Remove C
as a test condition option.
Change C
I
and C
O
values in Table I. Incorporate power reset feature.
Add 05 device. Add CAGE number 65786 for 04K, 04L and 043
devices. Add footnote 7/ to Table I. Editorial changes throughout
entire document.
Update drawing to current requirements. Editorial changes
throughout. – gap
Boilerplate update part of 5 year review. Ksr
Corrected I
IL
and I
IH
parameters in Table I. ksr
Update drawing to reflect current MIL-PRF-38535 requirements. – llb
89-08-23
M. A. Frye
B
91-11-06
M. A. Frye
C
D
E
F
01-11-02
06-08-18
10-03-29
17-10-18
Raymond Monnin
Raymond Monnin
Charles F. Saffle
Charles F. Saffle
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
REV
SHEET
F
1
F
2
F
3
F
4
F
5
F
6
F
7
F
8
F
9
F
10
F
11
F
12
PREPARED BY
Jeffery D. Bowling
CHECKED BY
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
Charles Reusing
APPROVED BY
Michael A. Frye
DRAWING APPROVAL DATE
88-07-27
REVISION LEVEL
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
MICROCIRCUIT, CMOS, ONE-TIME
PROGRAMMABLE, PROGRAMMABLE ARRAY
LOGIC, MONOLITHIC SILICON
SIZE
CAGE CODE
F
A
67268
SHEET
1 OF 12
5962-88670
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release. Distribution is unlimited.
5962-E055-18

5962-88670023X Related Products

5962-88670023X 5962-8867002LX 5962-88670033X 5962-8867003LX 5962-8867002LA 5962-88670033A
Description OT PLD, 30ns, CMOS, CQCC28, OT PLD, 30ns, CMOS, CDIP24, OT PLD, 40ns, CMOS, CQCC28, CERAMIC, LCC-28 OT PLD, 40ns, CMOS, CDIP24, 0.300 INCH, CERDIP-24 OT PLD, 30ns, CMOS, CDIP24, OT PLD, 40ns, CMOS, CQCC28, CERAMIC, LCC-28
Reach Compliance Code unknown unknown unknown unknown unknown unknown
Other features 10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS 10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS 10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS 10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS 10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS 10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS
maximum clock frequency 25 MHz 25 MHz 18.1 MHz 18.1 MHz 25 MHz 18.1 MHz
JESD-30 code S-CQCC-N28 R-GDIP-T24 S-CQCC-N28 R-GDIP-T24 R-GDIP-T24 S-CQCC-N28
length 11.43 mm 31.877 mm 11.43 mm 31.877 mm 31.877 mm 11.43 mm
Dedicated input times 11 11 11 11 11 11
Number of I/O lines 10 10 10 10 10 10
Number of terminals 28 24 28 24 24 28
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C
organize 11 DEDICATED INPUTS, 10 I/O 11 DEDICATED INPUTS, 10 I/O 11 DEDICATED INPUTS, 10 I/O 11 DEDICATED INPUTS, 10 I/O 11 DEDICATED INPUTS, 10 I/O 11 DEDICATED INPUTS, 10 I/O
Output function MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL
Package body material CERAMIC, METAL-SEALED COFIRED CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED
encapsulated code QCCN DIP QCCN DIP DIP QCCN
Package shape SQUARE RECTANGULAR SQUARE RECTANGULAR RECTANGULAR SQUARE
Package form CHIP CARRIER IN-LINE CHIP CARRIER IN-LINE IN-LINE CHIP CARRIER
Programmable logic type OT PLD OT PLD OT PLD OT PLD OT PLD OT PLD
propagation delay 30 ns 30 ns 40 ns 40 ns 30 ns 40 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.9812 mm 5.08 mm 1.9812 mm 5.08 mm 5.08 mm 1.9812 mm
Maximum supply voltage 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES NO YES NO NO YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY
Terminal form NO LEAD THROUGH-HOLE NO LEAD THROUGH-HOLE THROUGH-HOLE NO LEAD
Terminal pitch 1.27 mm 2.54 mm 1.27 mm 2.54 mm 2.54 mm 1.27 mm
Terminal location QUAD DUAL QUAD DUAL DUAL QUAD
width 11.43 mm 7.62 mm 11.43 mm 7.62 mm 7.62 mm 11.43 mm
Base Number Matches 1 1 1 1 1 1
JESD-609 code - - e0 e0 e0 e0
Terminal surface - - TIN LEAD TIN LEAD TIN LEAD TIN LEAD
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