5962-8867002LX datasheet, PDF - EEWORLD Datasheet

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5962-8867002LX: DescriptionOT PLD, 30ns, CMOS, CDIP24,; CategoryProgrammable logic devices Programmable logic; File Size233KB，14 Pages; ManufacturerMonolithic Memories

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5962-8867002LX Overview

OT PLD, 30ns, CMOS, CDIP24,

5962-8867002LX Parametric

Parameter Name	Attribute value
Reach Compliance Code	unknown
Other features	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS
maximum clock frequency	25 MHz
JESD-30 code	R-GDIP-T24
length	31.877 mm
Dedicated input times	11
Number of I/O lines	10
Number of terminals	24
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	11 DEDICATED INPUTS, 10 I/O
Output function	MACROCELL
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Programmable logic type	OT PLD
propagation delay	30 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	7.62 mm
Base Number Matches	1

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REVISIONS

LTR

DESCRIPTION

DATE (YR-MO-DA)

APPROVED

Add CAGE number 50364 as a supplier for 02 and 03 device types.

Add 04 device type. Add CAGE number 1FN41 as a supplier of the K

package. Editorial changes throughout entire document. Remove C

as a test condition option.

Change C

and C

values in Table I. Incorporate power reset feature.

Add 05 device. Add CAGE number 65786 for 04K, 04L and 043

devices. Add footnote 7/ to Table I. Editorial changes throughout

entire document.

Update drawing to current requirements. Editorial changes

throughout. – gap

Boilerplate update part of 5 year review. Ksr

Corrected I

and I

parameters in Table I. ksr

Update drawing to reflect current MIL-PRF-38535 requirements. – llb

89-08-23

M. A. Frye

91-11-06

M. A. Frye

01-11-02

06-08-18

10-03-29

17-10-18

Raymond Monnin

Charles F. Saffle

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

PMIC N/A

REV

SHEET

PREPARED BY

Jeffery D. Bowling

CHECKED BY

STANDARD

MICROCIRCUIT

DRAWING

THIS DRAWING IS AVAILABLE

FOR USE BY ALL

DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

AMSC N/A

Charles Reusing

APPROVED BY

Michael A. Frye

DRAWING APPROVAL DATE

88-07-27

REVISION LEVEL

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

http://www.landandmaritime.dla.mil

MICROCIRCUIT, CMOS, ONE-TIME

PROGRAMMABLE, PROGRAMMABLE ARRAY

LOGIC, MONOLITHIC SILICON

SIZE

CAGE CODE

67268

SHEET

1 OF 12

5962-88670

DSCC FORM 2233

APR 97

DISTRIBUTION STATEMENT A. Approved for public release. Distribution is unlimited.

5962-E055-18

1.4 Recommended operating conditions.

Supply voltage (V

) ........................................................................

High level input voltage (V

) ............................................................

Low level input voltage (V

) .............................................................

Case operating temperature range (T

) ...........................................

2. APPLICABLE DOCUMENTS

2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part

of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the

solicitation or contract.

DEPARTMENT OF DEFENSE SPECIFICATION

MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.

DEPARTMENT OF DEFENSE STANDARDS

MIL-STD-883 -

MIL-STD-1835 -

Test Method Standard Microcircuits.

Interface Standard Electronic Component Case Outlines.

4.5 V dc to 5.5 V dc

2.0 V dc minimum

0.8 V dc maximum

-55C to +125C

DEPARTMENT OF DEFENSE HANDBOOKS

MIL-HDBK-103 -

MIL-HDBK-780 -

List of Standard Microcircuit Drawings.

Standard Microcircuit Drawings.

(Copies of these documents are available online at

http://quicksearch.dla.mil

or from the Standardization Document Order

Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094).

2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text

of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a

specific exemption has been obtained.

3. REQUIREMENTS

3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-

JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer

Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-

PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying

activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan

may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device.

These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-

PRF-38535 is required to identify when the QML flow option is used. This drawing has been modified to allow the

manufacturer to use the alternate die/fabrication requirements of paragraph A.3.2.2 of MIL-PRF-38535 or other alternative

approved by the qualifying activity.

3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified

in MIL-PRF-38535, appendix A and herein.

3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein.

3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.

3.2.3 Truth table. The truth table shall be as specified on figure 2.

3.2.3.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing

shall be as specified on figure 2. When required in groups A, C, or D (see 4.3), the devices shall be programmed by the

manufacturer prior to test with a minimum of 50 percent of the total number of gates programmed or to any altered item

drawing pattern which includes at least 25 percent of the total number of gates programmed.

STANDARD

MICROCIRCUIT DRAWING

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-88670

SHEET

3.2.3.2 Programmed devices. The truth tables for programmed devices shall be as specified by an attached altered item

drawing.

3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are

as specified in table I and shall apply over the full case operating temperature range.

3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical

tests for each subgroup are described in table I.

3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN

listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD

PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device.

3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance

to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in

accordance with MIL-PRF-38535 to identify when the QML flow option is used. For product built in accordance with A.3.2.2 of

MIL-PRF-38535, or as modified in the manufacturer’s QM plan, the “QD” certification mark shall be used in place of the "Q" or

"QML" certification mark.

3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an

approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and

Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the

requirements of MIL-PRF-38535, appendix A and the requirements herein.

3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided

with each lot of microcircuits delivered to this drawing.

3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that

affects this drawing.

3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime's agent, and the acquiring activity retain the

option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made

available onshore at the option of the reviewer.

3.10 Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result

in a wide variety of configurations; two processing options are provided for selection in the contract, using an altered item

drawing.

3.10.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 3.2.3.1

and table II. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program

configuration.

3.10.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisions

herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery.

STANDARD

MICROCIRCUIT DRAWING

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-88670

SHEET

5962-8867002LX Related Products

	5962-8867002LX	5962-88670023X	5962-88670033X	5962-8867003LX	5962-8867002LA	5962-88670033A
Description	OT PLD, 30ns, CMOS, CDIP24,	OT PLD, 30ns, CMOS, CQCC28,	OT PLD, 40ns, CMOS, CQCC28, CERAMIC, LCC-28	OT PLD, 40ns, CMOS, CDIP24, 0.300 INCH, CERDIP-24	OT PLD, 30ns, CMOS, CDIP24,	OT PLD, 40ns, CMOS, CQCC28, CERAMIC, LCC-28
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown
Other features	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS	10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS
maximum clock frequency	25 MHz	25 MHz	18.1 MHz	18.1 MHz	25 MHz	18.1 MHz
JESD-30 code	R-GDIP-T24	S-CQCC-N28	S-CQCC-N28	R-GDIP-T24	R-GDIP-T24	S-CQCC-N28
length	31.877 mm	11.43 mm	11.43 mm	31.877 mm	31.877 mm	11.43 mm
Dedicated input times	11	11	11	11	11	11
Number of I/O lines	10	10	10	10	10	10
Number of terminals	24	28	28	24	24	28
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C
organize	11 DEDICATED INPUTS, 10 I/O	11 DEDICATED INPUTS, 10 I/O	11 DEDICATED INPUTS, 10 I/O	11 DEDICATED INPUTS, 10 I/O	11 DEDICATED INPUTS, 10 I/O	11 DEDICATED INPUTS, 10 I/O
Output function	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL
Package body material	CERAMIC, GLASS-SEALED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP	QCCN	QCCN	DIP	DIP	QCCN
Package shape	RECTANGULAR	SQUARE	SQUARE	RECTANGULAR	RECTANGULAR	SQUARE
Package form	IN-LINE	CHIP CARRIER	CHIP CARRIER	IN-LINE	IN-LINE	CHIP CARRIER
Programmable logic type	OT PLD	OT PLD	OT PLD	OT PLD	OT PLD	OT PLD
propagation delay	30 ns	30 ns	40 ns	40 ns	30 ns	40 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	5.08 mm	1.9812 mm	1.9812 mm	5.08 mm	5.08 mm	1.9812 mm
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	YES	YES	NO	NO	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY
Terminal form	THROUGH-HOLE	NO LEAD	NO LEAD	THROUGH-HOLE	THROUGH-HOLE	NO LEAD
Terminal pitch	2.54 mm	1.27 mm	1.27 mm	2.54 mm	2.54 mm	1.27 mm
Terminal location	DUAL	QUAD	QUAD	DUAL	DUAL	QUAD
width	7.62 mm	11.43 mm	11.43 mm	7.62 mm	7.62 mm	11.43 mm
Base Number Matches	1	1	1	1	1	1
JESD-609 code	-	-	e0	e0	e0	e0
Terminal surface	-	-	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD

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