®
®
ADS-942A
14-Bit, 2MHz, Low-Power
Sampling A/D Converters
FEATURES
•
•
•
•
•
•
•
•
14-bit resolution
2MHz minimum throughput
Low-power, 2.2 Watts
Functionally complete
Internal reference and S/H amplifier
78dB signal-to-noise ratio
Full Nyquist-rate sampling
Small 32-pin TDIP
GENERAL DESCRIPTION
DATEL's ADS-942A is a functionally complete, 14-bit, 2MHz,
sampling A/D converter. Packaged in a 32-pin TDIP, the unit
contains a fast-settling sample/hold amplifier, a 14-bit
subranging (two-pass) A/D converter, a precision reference,
three-state output register, and all the timing/control logic
necessary to operate from a single start convert pulse.
The ADS-942A is optimized for wideband frequency-domain
applications and is fully FFT tested. The ADS-942A requires
±15V and ±5V supplies and typically consumes 2.2 Watts
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
INPUT/OUTPUT CONNECTIONS
FUNCTION
+10V REF. OUT
BIPOLAR
AVALOG INPUT
SIGNAL GROUND
OFFSET ADJUST
ANALOG GROUND
OVERFLOW
CODING SELECT
ENABLE
+5V SUPPLY
DIGITAL GROUND
+15V SUPPLY
–15V SUPPLY
–5V SUPPLY
ANALOG GROUND
EOC
PIN
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
FUNCTION
START CONVERT
BIT 1 OUT (MSB)
BIT 1 OUT (MSB)
BIT 2 OUT
BIT 3 OUT
BIT 4 OUT
BIT 5 OUT
BIT 6 OUT
BIT 7 OUT
BIT 8 OUT
BIT 9 OUT
BIT 10 OUT
BIT 11 OUT
BIT 12 OUT
BIT 13 OUT
BIT 14 OUT (LSB)
DAC
31 BIT 1 OUT (MSB)
30 BIT 1 OUT (MSB)
+10V REF. OUT 1
OFFSET
CIRCUIT
S
2
FLASH
ADC
BIPOLAR 2
S
1
BUFFER
REF
DIGITAL CORRECTION LOGIC
3-STATE OUTPUT REGISTER
29 BIT 2 OUT
28 BIT 3 OUT
27 BIT 4 OUT
26 BIT 5 OUT
25 BIT 6 OUT
24 BIT 7 OUT
23 BIT 8 OUT
22 BIT 9 OUT
21 BIT 10 OUT
20 BIT 11 OUT
19 BIT 12 OUT
18 BIT 13 OUT
17 BIT 14 OUT (LSB)
START CONVERT 32
TIMING AND
CONTROL LOGIC
EOC 16
9 ENABLE
7 OVERFLOW
4
SIGNAL
GROUND
10
+5V
SUPPLY
11
DIGITAL
GROUND
12
+15V
SUPPLY
13
–15V
SUPPLY
14
–5V
SUPPLY
6, 15
ANALOG
GROUND
8
CODING
SELECT
OFFSET ADJUST 5
ANALOG INPUT 3
S/H
REGISTER
Figure 1. ADS-942A Functional Block Diagram
DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.)
•
Tel: (508) 339-3000 Fax: (508) 339-6356
•
For immediate assistance: (800) 233-2765
REGISTER
®
®
ADS-942A
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
+15V Supply
(Pin 12)
–15V Supply
(Pin 13)
+5V Supply
(Pin 10)
–5V Supply
(Pin 14)
Digital Inputs
(Pin 8,9, 32)
Analog Input
(Pin 3)
Lead Temp.
(10 seconds)
LIMITS
0 to +16
0 to –16
0 to +6
0 to –6
–0.3 to +V
DD
+0.3
±15
+300
UNITS
Volts
Volts
Volts
Volts
Volts
Volts
°C
OUTPUTS
Output Coding
Logic Level
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Internal Reference
Voltage, +25°C
Drift
External Current
DYNAMIC PERFORMANCE
Total Harm. Distort.
(0.5dB)
dc to 100kHz
100kHz to 500kHz
500kHz to 1MHz
Signal-to-Noise Ratio
(w/o distortion, –0.5dB
dc to 100kHz
100kHz to 500kHz
500kHz to 1MHz
Signal-to-Noise Ratio
(and distortion, –0.5dB)
dc to 100kHz
100kHz to 500kHz
500kHz to 1MHz
Spurious Free Dyn. Range
dc to 100kHz
100 to 500kHz
500kHz to 1MHz
Two-tone IMD
Input Bandwidth
(–3dB)
Small Signal (–20dB input)
Large Signal (–0.5dB input)
Slew Rate
Aperture Delay Time
Aperature Uncertainty
S/H Acq. Time,
(to ±0.003%FSR)
Sinusoidal (fin = 1MHz)
Step input (10V)
Conversion Rate
Sinusoidal (fin = 1MHz)
Step input
Feedthrough Rejection
(fin = 1MHz)
Overvoltage Recovery,
±12V
Noise
POWER REQUIREMENTS
Power Supply Ranges
+15V Supply
–15V Supply
+5V Supply
–5V Supply
Power Supply Currents
+15V Supply
–15V Supply
+5V Supply
–5V Supply
Power Dissipation
Power Supply Rejection
PHYSICAL/ENVIRONMENTAL
+14.25
–14.25
+4.75
–4.75
—
—
—
—
—
—
+15.0
–15.0
+5.0
–5.0
+65
–19
+150
–55
2.2
—
+15.75
–15.75
+5.25
–5.25
+80
–35
+175
–65
2.6
±0.03
Volts
Volts
Volts
Volts
mA
mA
mA
mA
Watts
%FSR%V
—
—
—
74
73
—
73
72
—
—
—
—
—
—
—
—
—
—
—
—
2
1.3
—
—
—
–85
–80
–77
78
75
73
78
75
72
–86
–81
–78
85
6
1.75
±250
—
—
—
250
—
—
85
1000
250
–76
–75
—
—
—
—
—
—
—
–77
–75
—
—
—
—
—
±10
5
150
450
—
—
—
2000
—
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
MHz
MHz
V/µs
ns
ps, ms
ns
ns
MHz
MHz
dB
ns
µVrms
MIN.
TYP.
MAX.
UNITS
Staight Bin./Offset Bin./2's Comp.
Comp. Bin./Comp. Offset Bin./C2C
+2.4
—
—
—
+9.98
—
—
—
—
—
—
+10.0
±13
—
—
+0.4
–160
+6.4
+10.02
±30
5
Volts
Volts
µA
mA
Volts
ppm/°C
mA
FUNCTIONAL SPECIFICATIONS
(T
A
= +25°C, ±V
CC
= ±15V, ±V
DD
= ±5V, 2MHz sampling rate, and a minimum 7 minute
warmup
unless otherwise specified.)
ANALOG INPUTS
Input Voltage Range
Unipolar
Bipolar
Input Impedence
Input Capacitance
DIGITAL INPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
PERFORMANCE
Integral Non-Linearity
+25°C
0 to +70°C
–40 to +85°C
Differential Non-Linearity
+25°C
0 to +70°C
–40 to +85°C
Full Scale Absolute Accuracy
+25°C
0 to +70°C
–40 to +85°C
Unipolar Zero Error
+25°C
0 to +70°C
–40 to ±85°C
Bipolar Zero Error
+25°C
0 to +70°C
–40 to +85°C
Bipolar Offset Error
+25°C
0 to +70°C
–40 to +85°C
Gain Error
+25°C
0 to +70°C
–40 to +85°C
No Missing Codes
(f
in
= 500kHz)
14 Bits
13 Bits
Resolution
—
—
—
—
–0.95
–1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
±1
±1
±2
±0.5
±0.75
±1
±0.1
±0.12
±0.45
±0.05
±0.1
±0.2
±0.05
±0.1
±0.2
±0.1
±0.12
±0.5
±0.018
±0.12
±0.6
0 to +70°C
–40 to +85°C
14 Bits
±2
±2
±3
±0.75
±0.95
+2.5
±0.122
±0.36
±0.85
±0.122
±0.2
±0.3
±0.122
±0.2
±0.3
±0.2
±0.3
±0.8
±0.122
±0.3
±0.8
LSB
LSB
LSB
LSB
LSB
LSB
%FSR
%FSR
%FSR
%FSR
%FSR
%FSR
%FSR
%FSR
%FSR
%FSR
%FSR
%FSR
%
%
%
+2.0
—
—
—
—
—
—
—
—
+0.8
+10
–600
Volts
Volts
µA
µA
MIN.
—
—
2.3
—
TYP.
0 to +10
±5
2.5
7
MAX.
—
—
—
15
UNITS
Volts
Volts
kΩ
pF
Footnote:
Effective Bits is equal to:
(SNR + Distortion) – 1.76 +
20 log
6.02
Full Scale Amplitude
Actual Input Amplitude
Same specification as In-Band Harmonics and Peak Harmonics.
Two-tone Intermodulation Distortion (IMD) conditions:
f
in
= 100kHz, 240kHz, fs = 2MHz, –0.5dB
Operating Temp. Range, Case
ADS-942AMC
ADS-942AME
Storage Temperature Range
Package Type
Weight
0
—
+70
°C
–40
—
+85
°C
–65
—
+150
°C
32-pin, metal-sealed, ceramic TDIP
0.46 ounces (13 grams)
2
®
®
ADS-942A
TECHNICAL NOTES
1. Rated performance requires using good high-frequency
circuit board layout techniques. Connect the digital and
analog grounds to one point, the analog ground plane
beneath the converter. Due to the inductance and resis-
tance of the power supply return paths, return the analog
and digital ground separately to the power supplies.
SIGNAL GROUND (pin 4) is not internally connected to
ANALOG GROUND (pins 6, 15).
2. Bypass the analog and digital supplies and the +10V REF.
OUT (pin 1) to ground with a 4.7µF, 25V tantalum electro-
lytic capacitor in parallel with a 0.1µF ceramic capacitor.
3. CODING SELECT(pin 8) is compatible with CMOS/TTL
logic levels for those users desiring logic control of this
function. There is an internal pull-up resistor on this pin;
connect to +5V or leave open for logic 1. See the Calibra-
tion Procedure for selecting an output coding.
4. To enable the three-state outputs, connect ENABLE (pin 9)
to a logic "0" (low). To disable, connect pin 9 to a logic "1"
(high).
5. OVERFLOW (pin 7) changes from low (logic "0") to high
(logic "1") when the input voltage exceeds the input voltage
range limits by 1LSB (610µV).
For bipolar operation, adjust the trimpot until the code
flickers equally between 10 0000 0000 0000 and 10 0000
0000 0001 with pin 8 tied low (offset binary) or between 01
1111 1111 1111 and 01 1111 1111 1110 with pin 8 tied high
(complementary offset binary).
Two's complement coding requires using pin 31 (MSB).
With pin 8 tied low, adjust the trimpot until the code flickers
between 00 0000 0000 0000 and 00 0000 0000 0001.
3.
Full-Scale (Gain) Adjustment
Set the output of the voltage reference used in step 2 to the
value shown in Table 2.
Adjust the gain trimpot until the output code flickers equally
between 11 1111 1111 1110 and 11 1111 1111 1111 with pin 8
tied low (straight binary/offset binary) or between 00 0000
0000 0000 and 00 0000 0000 0001 with pin 8 tied high
(complementary binary/complementary offset binary).
Two's complement coding requires using pin 31 (MSB).
With pin 8 tied low, adjust the gain trimpot until the output
code flickers equally between 01 1111 1111 1110 and 01
1111 1111 1111.
4. To confirm proper operation of the device, vary the precision
reference voltage source to obtain the output coding listed
in Table 3.
Table 1. Input Connections
CALIBRATION PROCEDURE
1. Connect the converter per Figure 3 and Table 1 for the
appropriate input voltage range. Apply a pulse of 35
nanoseconds minimum to START CONVERT (pin 32) at a
rate of 200kHz. This rate is chosen to reduce flicker if
LED's are used on the outputs for calibration purposes.
2.
Zero Adjustments
Apply a precision voltage reference source between
ANALOG INPUT (pin 3) and SIGNAL GROUND (pin 4),
then adjust the reference source output per Table 2.
For unipolar, adjust the zero trimpot so that the output code
flickers equally between 00 0000 0000 0000 and 00 0000
0000 0001 with CODING SELECT (pin 8) tied low (straight
binary) or between 11 1111 1111 1111 and 11 1111 1111 1110
with pin 8 tied high (complementary binary).
START
CONVERT
INPUT RANGE
0 +10V
±5V
INPUT PIN
Pin 3
Pin 3
TIE TOGETHER
Pins 2 and 4
Pins 1 and 2
Table 2. Zero and Gain Adjustments
Input Zero Adjust
Range
0 to +10V
±5V
Gain Adjust
+½ LSB
+305µV
+305µV
FS – 1½ LSB
+9.999085V
+4.999085V
N
35ns min., 50ns typ., 60 ns max
35ns max..
N+1
EOC
Conversion Time
300ns typ., 325ns max.
10ns typ.
15ns max.
35ns typ.
INTERNAL S/H
Hold
350ns min.
150ns max.
Aquisition Time
30ns max.
OUTPUT
DATA
DATA N-1 VALID
300ns min.
INVALID DATA
200ns max.
DATA N VALID
Note: Scale is approximately 25ns per division.
Figure 2. ADS-942A Timing Diagram
3
®
®
ADS-942A
Use external trimpots to remove system errors or to reduce
small initial errors to zero. Use a 100Ω trimpot in series
with the analog input for gain adjustment; use a fixed 50Ω
resistor in its place for operation without adjustment.
Use a 20kΩ trimpot with the wiper tied to OFFSET ADJUST
(pin 5) for zero/offset adjustment. Connect pin 5 to ANA-
LOG GROUND (pin 6) for operation without zero/offset
adjustment.
ZERO/OFFSET
ADJUST
20k
Ω
+15V
–15V
+
+5V
4.7µF
10
0.1µF
DIGITAL
11 GROUND
14
5
OFFSET
ADJUST
31 BIT 1 OUT(MSB)
30 BIT 1 OUT(MSB)
29 BIT 2 OUT
28 BIT 3 OUT
27 BIT 4 OUT
26 BIT 5 OUT
25 BIT 6 OUT
24 BIT 7 OUT
23 BIT 8 OUT
22 BIT 9 OUT
21 BIT 10 OUT
20 BIT 11 OUT
19 BIT 12 OUT
4.7µF
–5V
+
0.1µF
4.7µF
+
+
+15V
12
0.1µF
6, 15 ANALOG
GROUND
13
4.7µF
–15V
0.1µF
ADS-942A
GAIN ADJUST
18 BIT 13 OUT
17 BIT 14 OUT (LSB)
7 OVERFLOW
16 EOC
0 to +10V
100
Ω
3 ANALOG INPUT
CODING SELECT
4 SIGNAL GROUND
START CONVERT 32
1 +10V REF. OUT
ENABLE
BIPOLAR
9
2
8
+5V
0.1µF
4.7µF
Figure 3. ADS-942A Connection Diagram (Unipolar Input)
Table 3. Output Coding
STRAIGHT BIN.
UNIPOLAR
SCALE
INPUT VOLT.
0 TO +10V
MSB
LSB
COMP. BINARY
OUTPUT CODING
MSB
LSB
MSB
LSB
INPUT VOLT.
±5V
BIPOLAR
SCALE
+FS – 1 LSB
+7/8 FS
+3/4 FS
+1/2 FS
+1/4 FS
+1/8 FS
+1 LSB
0
+9.999390
+8.750000
+7.500000
+5.000000
+2.500000
+1.250000
+0.000610
0.000000
11 1111 1111 1111
11 1000 0000 0000
11 0000 0000 0000
10 0000 0000 0000
01 0000 0000 0000
00 1000 0000 0000
00 0000 0000 0001
00 0000 0000 0000
OFF. BINARY
00 0000 0000 0000
00 0111 1111 1111
00 1111 1111 1111
01 1111 1111 1111
10 1111 1111 1111
11 0111 1111 1111
11 1111 1111 1110
11 1111 1111 1111
COMP. OFF. BIN.
01 1111 1111 1111
01 1000 0000 0000
01 0000 0000 0000
00 0000 0000 0000
11 0000 0000 0000
10 1000 0000 0000
10 0000 0000 0001
10 0000 0000 0000
TWO'S COMP.
+4.999390
+3.750000
+2.500000
0.000000
–2.500000
–3.750000
–4.999390
–5.000000
+FS – 1LSB
+3/4FS
+1/2FS
0
–1/2FS
–3/4FS
–FS+1LSB
–FS
4
®
®
ADS-942A
THERMAL REQUIREMENTS
All DATEL sampling A/D converters are fully characterized and
specified over operating temperature (case) ranges of 0 to
+70°C and -55 to +125°C. All room-temperature (T
A
= +25°C)
production testing is performed without the use of heat sinks or
forced-air cooling. Thermal impedance figures for each device
are listed in their respective specification tables.
These devices do not normally require heat sinks, however,
standard precautionary design and layout procedures should
be used to ensure devices do not overheat. The ground and
power planes beneath the package, as well as all pcb signal
runs to and from the device, should be as heavy as possible to
help conduct heat away from the package.
Electrically-insulating, thermally-conductive "pads" may be
installed underneath the package. Devices should be soldered
to boards rather than "socketed", and of course, minimal air
flow over the surface can greatly help reduce the package
temperature.
In more severe ambient conditions, the package/junction
temperature of a given device can be reduced dramatically
(typically 35%) by using one of DATEL's HS Series heat sinks.
See Ordering Information for the assigned part number. See
page 1-183 of the DATEL Data Acquisition Components
Catalog for more information on the HS Series. Request
DATEL Application Note AN-8, "Heat Sinks for DIP Data
Converters", or contact DATEL directly, for additional
information.
0
–10
Amplitude Relative to Full Scale (dB)
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Frequency (MHz)
(fs = 2MHz, fin = 490kHz, Vin = –0.5dB, 16,384-point FFT)
Figure 4. FFT Analysis of ADS-942A
5
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