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KM6264BLP-7

Description
8Kx8 bit Low Power CMOS Static RAM
Categorystorage    storage   
File Size74KB,10 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
Download Datasheet Parametric View All

KM6264BLP-7 Overview

8Kx8 bit Low Power CMOS Static RAM

KM6264BLP-7 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerSAMSUNG
Parts packaging codeDIP
package instructionDIP, DIP28,.6
Contacts28
Reach Compliance Codeunknow
ECCN codeEAR99
Maximum access time70 ns
I/O typeCOMMON
JESD-30 codeR-PDIP-T28
JESD-609 codee0
length36.32 mm
memory density65536 bi
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of ports1
Number of terminals28
word count8192 words
character code8000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize8KX8
Output characteristics3-STATE
ExportableYES
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP28,.6
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum standby current0.00005 A
Minimum standby current2 V
Maximum slew rate0.045 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width15.24 mm
KM6264B Family
8Kx8 bit Low Power CMOS Static RAM
FEATURE SUMMARY
Process Technology : CMOS
Organization : 8K x 8
Power Supply Voltage : Single 5V ± 10%
Low Data Retention Voltage : 2V(Min)
Three state output and TTL Compatible
Package Type : JEDEC Standard
28-DIP, 28-SOP
CMOS SRAM
GENERAL DESCRIPTION
The KM6264B family is fabricated by SAMSUNG's
advanced CMOS process technology. The family
can support various operating temperature ranges
and has various package types for user flexibility of
system design. The family also support low data
retention voltage for battery back-up operations with
low data retention current.
PRODUCT FAMILY
Product
Family
KM6264BL
KM6264BL-L
KM6264BLE
KM6264BLE-L
KM6264BLI
KM6264BLI-L
Operating
Temperature
Commercial
(0~70 °C)
Extended
(-25~-85 °C)
Industrial
(-40~85 °C)
Speed
PKG Type
Power Dissipation
Standby(Isb1, Max) Operating(Icc2)
100uA
70/100/120ns 28-DIP, 28-SOP
100*ns
100*ns
28-SOP
28-SOP
10uA
100uA
50uA
100uA
50uA
55mA
* measured with 30pF test load
PIN DESCRIPTION
N.C
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
Vcc
/WE
FUNCTIONAL BLOCK DIAGRAM
Y-Decoder
X-Decoder
Control Logic
CS2
A8
A9
A11
/OE
A10
/CS1
I/O8
I/O7
I/O6
I/O5
I/O4
Cell Array
A0~A12
28-Pin DIP
28-Pin SOP
22
21
20
19
18
17
16
15
I/O1~8
I/O Buffer
Function
/CS1, CS2
/WE, /OE
Pin Name
A0~A12
/WE
/CS1, CS2
/OE
I/O1~I/O8
Vcc
Vss
N.C
Address Inputs
Write Enable Input
Chip Select Input
Output Enable Input
Data Input/Output
Power(5V)
Ground
No Connection
1
ELECTRONICS
Revision. 0.0
Auust. 1996
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