K9W4G08U1M
K9K2G08Q0M
K9K2G08U0M
K9W4G16U1M
K9K2G16Q0M
K9K2G16U0M
FLASH MEMORY
Document Title
256M x 8 Bit / 128M x 16 Bit NAND Flash Memory
Revision History
Revision No
0.0
0.1
History
1. Initial issue
1. I
OL
(R/B) of 1.8V device is changed.
-min. Value: 7mA -->3mA
-typ. Value: 8mA -->4mA
Draft Date
Aug. 30.2001
Nov. 5.2001
Remark
Advance
0.2
1. 5th cycle of ID is changed
: 40h --> 44h
1. Add WSOP Package Dimensions.
1. Add two-K9K2GXXU0M-YCB0/YIB0 Stacked Package
1. Min valid block of K9W4GXXU1M-YCB0/YIB0 is changed .
- min. 4016 --> 4036
1.
Each K9K2GXXX0M chip in the K9W4GXXU1M has Maximum 30
Jan. 23. 2002
0.3
0.4
0.5
May.29.2002
Aug.13.2002
Aug. 22.2002
0.6
Nov. 07.2002
invalid blocks.
2. K9W4GXXU1M’s ID is changed
(Before)
Device
K9W4G08U1M
K9W4G16U1M
(After)
Device
K9W4G08U1M
K9W4G16U1M
2nd Cycle 3rd cycle
DAh
CAh
C1
C1
4th Cycle
15h
55h
5th Cycle
44h
44h
2nd Cycle 3rd cycle 4th Cycle 5th Cycle
DCh
CCh
C3
C3
15h
55h
4Ch
4Ch
0.7
1. Add the Rp vs tr ,tf & Rp vs ibusy graph for 1.8V device (Page 36)
2. Add the data protection Vcc guidence for 1.8V device - below about 1.1V.
(Page 37)
The min. Vcc value 1.8V devices is changed.
K9K2GXXQ0M : Vcc 1.65V~1.95V --> 1.70V~1.95V
Nov. 22.2002
0.8
Mar. 6.2003
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have
any questions, please contact the SAMSUNG branch office near your office.
1
K9W4G08U1M
K9K2G08Q0M
K9K2G08U0M
K9W4G16U1M
K9K2G16Q0M
K9K2G16U0M
FLASH MEMORY
Document Title
256M x 8 Bit / 128M x 16 Bit
NAND Flash Memory
Revision History
Revision No
0.9
History
Pb-free Package is added.
K9K2G08U0M-FCB0,FIB0
K9K2G08Q0M-PCB0,PIB0
K9K2G08U0M-PCB0,PIB0
K9K2G16U0M-PCB0,PIB0
K9K2G16Q0M-PCB0,PIB0
K9W4G08U1M-PCB0,PIB0,ECB0,EIB0
K9W4G16U1M-PCB0,PIB0,ECB0,EIB0
Errata is added.(Front Page)-K9K2GXXQ0M
tWC tWP tWH tRC tREH tRP tREA tCEA
Specification
45 25 15 50 15 25 30
45
Relaxed value 80 60 20 80 20 60 60
75
1. The 3rd Byte ID after 90h ID read command is don’t cared.
The 5th Byte ID after 90h ID read command is deleted.
New package dimension is added.(K9W4GXXU1M-KXB0/EXB0)
1. Min valid block of K9W4GXXU1M-YCB0/YIB0 is changed .
- min. 4036 --> 4016
2. Note is added.
(VIL can undershoot to -0.4V and VIH can overshoot to VCC +0.4V for
durations of 20 ns or less.)
AC parameters are changed-K9K2GXXQ0M
tWC tWP tWH tRC tREH tRP tREA tCEA
Before 45 25 15 50 15 25 30
45
After
80 60 20 80 20 60 60
75
Draft Date
Mar. 13.2003
Remark
1.0
Mar. 17.2003
1.1
Apr. 9. 2003
1.2
1.3
Apr. 15. 2003
Apr. 18. 2003
Aug. 5. 2003
1.4
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have
any questions, please contact the SAMSUNG branch office near your office.
2
K9W4G08U1M
K9K2G08Q0M
K9K2G08U0M
K9W4G16U1M
K9K2G16Q0M
K9K2G16U0M
FLASH MEMORY
256M x 8 Bit / 128M x 16 Bit NAND Flash Memory
PRODUCT LIST
Part Number
K9K2G08Q0M-Y,P
K9K2G16Q0M-Y,P
K9XXG08UXM-Y,P,K,E
K9XXG16UXM-Y,P,K,E
K9K2G08U0M-V,F
2.7 ~ 3.6V
Vcc Range
1.7 ~ 1.95V
Organization
X8
X16
X8
X16
X8
WSOP1
TSOP1
PKG Type
FEATURES
•
Voltage Supply
-1.8V device(K9K2GXXQ0M): 1.7V~1.95V
-3.3V device(K9XXGXXUXM): 2.7 V ~3.6 V
•
Organization
- Memory Cell Array
-X8 device(K9K2G08X0M) : (256M + 8,192K)bit x 8bit
-X16 device(K9K2G16X0M) : (128M + 4,096K)bit x 16bit
- Data Register
-X8 device(K9K2G08X0M): (2K + 64)bit x8bit
-X16 device(K9K2G16X0M): (1K + 32)bit x16bit
- Cache Register
-X8 device(K9K2G08X0M): (2K + 64)bit x8bit
-X16 device(K9K2G16X0M): (1K + 32)bit x16bit
•
Automatic Program and Erase
- Page Program
-X8 device(K9K2G08X0M): (2K + 64)Byte
-X16 device(K9K2G16X0M): (1K + 32)Word
- Block Erase
-X8 device(K9K2G08X0M): (128K + 4K)Byte
-X16 device(K9K2G16X0M): (64K + 2K)Word
•
Page Read Operation
- Page Size
- X8 device(K9K2G08X0M): 2K-Byte
- X16 device(K9K2G16X0M) : 1K-Word
- Random Read : 25µs(Max.)
- Serial Access
1.8V device(K9K2GXXQ0M): 80ns(Min.)
3.3V device(K9XXGXXUXM): 50ns(Min.)
•
Fast Write Cycle Time
- Program time : 300µs(Typ.)
- Block Erase Time : 2ms(Typ.)
•
Command/Address/Data Multiplexed I/O Port
•
Hardware Data Protection
- Program/Erase Lockout During Power Transitions
•
Reliable CMOS Floating-Gate Technology
- Endurance : 100K Program/Erase Cycles
- Data Retention : 10 Years
•
Command Register Operation
•
Cache Program Operation for High Performance Program
•
Power-On Auto-Read Operation
•
Intelligent Copy-Back Operation
•
Unique ID for Copyright Protection
•
Package :
- K9K2GXXX0M-YCB0/YIB0
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
- K9K2G08U0M-VCB0/VIB0
48 - Pin WSOP I (12X17X0.7mm)
- K9K2GXXX0M-PCB0/PIB0
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)- Pb-free Package
- K9K2G08U0M-FCB0/FIB0
48 - Pin WSOP I (12X17X0.7mm)- Pb-free Package
* K9K2G08U0M-V,F(WSOPI ) is the same device as
K9K2G08U0M-Y,P(TSOP1) except package type.
- K9W4GXXU1M-YCB0,PCB0/YIB0,PIB0 : Two K9K2G08U0M
stacked.
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
- K9W4GXXU1M-KCB0,ECB0/KIB0,EIB0 : Two K9K2G08U0M
stacked.
48 - Pin TSOP I (12 x 17 / 0.5 mm pitch)
GENERAL DESCRIPTION
Offered in 256Mx8bit or 128Mx16bit, the K9K2GXXX0M is 2G bit with spare 64M bit capacity. Its NAND cell provides the most cost-
effective solution for the solid state mass storage market. A program operation can be performed in typical 300µs on the 2112-byte(X8
device) or 1056-word(X16 device) page and an erase operation can be performed in typical 2ms on a 128K-byte(X8 device) or 64K-
word(X16 device) block. Data in the data page can be read out at 80ns(1.8V device) or 50ns(3.3V device) cycle time per byte(X8
device) or word(X16 device). The I/O pins serve as the ports for address and data input/output as well as command input. The on-chip
write controller automates all program and erase functions including pulse repetition, where required, and internal verification and
margining of data. Even the write-intensive systems can take advantage of the K9K2GXXX0M′s extended reliability of 100K program/
erase cycles by providing ECC(Error Correcting Code) with real time mapping-out algorithm. The K9K2GXXX0M is an optimum solu-
tion for large nonvolatile storage applications such as solid state file storage and other portable applications requiring non-volatility.
An ultra high density solution having two 2Gb stacked with two chip selects is also available in standard TSOPI package.
3
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