AT49SV802A-90CI datasheet, PDF

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AT49SV802A-90CI: Description8-megabit 1.8-volt Only Flash Memory; Categorystorage storage; File Size239KB，31 Pages; ManufacturerAtmel (Microchip)

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AT49SV802A-90CI Overview

8-megabit 1.8-volt Only Flash Memory

AT49SV802A-90CI Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Atmel (Microchip)
Parts packaging code	BGA
package instruction	6 X 8 MM, 1 MM HEIGHT, 0.80 MM PITCH, PLASTIC, CBGA-48
Contacts	48
Reach Compliance Code	compli
ECCN code	EAR99
Maximum access time	90 ns
Spare memory width	8
startup block	BOTTOM
JESD-30 code	R-PBGA-B48
JESD-609 code	e0
length	8 mm
memory density	8388608 bi
Memory IC Type	FLASH
memory width	16
Humidity sensitivity level	3
Number of functions	1
Number of terminals	48
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	105 °C
Minimum operating temperature	-40 °C
organize	512KX16
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
Programming voltage	1.8 V
Certification status	Not Qualified
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	1.95 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
type	NOR TYPE
width	6 mm

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Features

•

Single Voltage Read/Write Operation: 1.65V to 1.95V

•

Access Time – 90 ns

•

Sector Erase Architecture

– Fifteen 32K Word (64K Bytes) Sectors with Individual Write Lockout

– Eight 4K Word (8K Bytes) Sectors with Individual Write Lockout

Fast Byte/Word Program Time – 12 µs

Fast Sector Erase Time – 300 ms

Suspend/Resume Feature for Erase and Program

– Supports Reading and Programming from Any Sector by Suspending Erase

of a Different Sector

– Supports Reading Any Byte/Word in the Non-suspending Sectors by Suspending

Programming of Any Other Byte/Word

Low-power Operation

– 12 mA Active

– 13 µA Standby

Data Polling, Toggle Bit, Ready/Busy for End of Program Detection

RESET Input for Device Initialization

Sector Lockdown Support

TSOP and CBGA Package Options

Top or Bottom Boot Block Configuration Available

128-bit Protection Register

Minimum 100,000 Erase Cycles

Common Flash Interface (CFI)

Green (Pb/Halide-free) Packaging Option

•

8-megabit

(512K x 16/

1M x 8)

1.8-volt Only

Flash Memory

AT49SV802A

AT49SV802AT

Preliminary

1. Description

The AT49SV802A(T) is a 1.8-volt 8-megabit Flash memory organized as 524,288

words of 16 bits each or 1,048,576 bytes of 8 bits each. The x16 data appears on

I/O0 - I/O15; the x8 data appears on I/O0 - I/O7. The memory is divided into 23 sec-

tors for erase operations. The AT49SV802A(T) is offered in a 48-lead TSOP and a

48-ball CBGA package. The device has CE and OE control signals to avoid any bus

contention. This device can be read or reprogrammed using a single power supply,

making it ideally suited for in-system programming.

The device powers on in the read mode. Command sequences are used to place the

device in other operation modes such as program and erase. The device has the

capability to protect the data in any sector (see

“Sector Lockdown” on page 7).

To increase the flexibility of the device, it contains an Erase Suspend and Program

Suspend feature. This feature will put the erase or program on hold for any amount of

time and let the user read data from or program data to any of the remaining sectors

within the memory. The end of a program or an erase cycle is detected by the

READY/BUSY pin, Data Polling or by the toggle bit.

3522C–FLASH–3/05

AT49SV802A(T) [Preliminary]

or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE. Standard

microprocessor write timings are used. The address locations used in the command sequences

are not affected by entering the command sequences.

4.3

Reset

A RESET input pin is provided to ease some system applications. When RESET is at a logic

high level, the device is in its standard operating mode. A low level on the RESET input halts the

present device operation and puts the outputs of the device in a high impedance state. When a

high level is reasserted on the RESET pin, the device returns to the read or standby mode,

depending upon the state of the control inputs.

4.4

Erasure

Before a byte/word can be reprogrammed, it must be erased. The erased state of memory bits is

a logical “1”. The entire device can be erased by using the Chip Erase command or individual

sectors can be erased by using the Sector Erase command.

4.4.1

Chip Erase

The entire device can be erased at one time by using the six-byte chip erase software code.

After the chip erase has been initiated, the device will internally time the erase operation so that

no external clocks are required. The maximum time to erase the chip is t

If the sector lockdown has been enabled, the chip erase will not erase the data in the sector that

has been locked out; it will erase only the unprotected sectors. After the chip erase, the device

will return to the read or standby mode.

4.4.2

Sector Erase

As an alternative to a full chip erase, the device is organized into 23 sectors (SA0 - SA22) that

can be individually erased. The Sector Erase command is a six-bus cycle operation. The sector

address is latched on the falling WE edge of the sixth cycle while the 30H data input command is

latched on the rising edge of WE. The sector erase starts after the rising edge of WE of the sixth

cycle. The erase operation is internally controlled; it will automatically time to completion. The

maximum time to erase a sector is t

SEC

. When the sector programming lockdown feature is not

enabled, the sector will erase (from the same Sector Erase command). An attempt to erase a

sector that has been protected will result in the operation terminating immediately.

4.5

Byte/Word Programming

Once a memory block is erased, it is programmed (to a logical “0”) on a byte-by-byte or on a

word-by-word basis. Programming is accomplished via the internal device command register

and is a four-bus cycle operation. The device will automatically generate the required internal

program pulses.

Any commands written to the chip during the embedded programming cycle will be ignored. If a

hardware reset happens during programming, the data at the location being programmed will be

corrupted. Please note that a data “0” cannot be programmed back to a “1”; only erase opera-

tions can convert “0”s to “1”s. Programming is completed after the specified t

cycle time. The

Data Polling feature or the Toggle Bit feature may be used to indicate the end of a program

cycle. If the erase/program status bit is a “1”, the device was not able to verify that the erase or

program operation was performed successfully.

3522C–FLASH–3/05

AT49SV802A-90CI Related Products

	AT49SV802A-90CI	AT49SV802A	AT49SV802AT	AT49SV802A-90TI	AT49SV802A-90CU	AT49SV802AT-90TI	AT49SV802A-90TU	AT49SV802AT-90CI
Description	8-megabit 1.8-volt Only Flash Memory	8-megabit 1.8-volt Only Flash Memory	8-megabit 1.8-volt Only Flash Memory	8-megabit 1.8-volt Only Flash Memory	8-megabit 1.8-volt Only Flash Memory	8-megabit 1.8-volt Only Flash Memory	8-megabit 1.8-volt Only Flash Memory	8-megabit 1.8-volt Only Flash Memory
Is it Rohs certified?	incompatible	-	-	incompatible	conform to	incompatible	conform to	incompatible
Maker	Atmel (Microchip)	-	-	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)
Parts packaging code	BGA	-	-	TSOP1	BGA	TSOP1	TSOP1	BGA
package instruction	6 X 8 MM, 1 MM HEIGHT, 0.80 MM PITCH, PLASTIC, CBGA-48	-	-	12 X 20 MM, PLASTIC, MO-142DD, TSOP1-48	VFBGA,	12 X 20 MM, PLASTIC, MO-142DD, TSOP1-48	TSOP1,	6 X 8 MM, 1 MM HEIGHT, 0.80 MM PITCH, PLASTIC, CBGA-48
Contacts	48	-	-	48	48	48	48	48
Reach Compliance Code	compli	-	-	compli	compli	compli	compli	compli
ECCN code	EAR99	-	-	EAR99	EAR99	EAR99	EAR99	EAR99
Maximum access time	90 ns	-	-	90 ns	90 ns	90 ns	90 ns	90 ns
Spare memory width	8	-	-	8	8	8	8	8
startup block	BOTTOM	-	-	BOTTOM	BOTTOM	TOP	BOTTOM	TOP
JESD-30 code	R-PBGA-B48	-	-	R-PDSO-G48	R-PBGA-B48	R-PDSO-G48	R-PDSO-G48	R-PBGA-B48
JESD-609 code	e0	-	-	e0	e1	e0	e3	e0
length	8 mm	-	-	18.4 mm	8 mm	18.4 mm	18.4 mm	8 mm
memory density	8388608 bi	-	-	8388608 bi	8388608 bi	8388608 bi	8388608 bi	8388608 bi
Memory IC Type	FLASH	-	-	FLASH	FLASH	FLASH	FLASH	FLASH
memory width	16	-	-	16	16	16	16	16
Humidity sensitivity level	3	-	-	3	3	3	3	3
Number of functions	1	-	-	1	1	1	1	1
Number of terminals	48	-	-	48	48	48	48	48
word count	524288 words	-	-	524288 words	524288 words	524288 words	524288 words	524288 words
character code	512000	-	-	512000	512000	512000	512000	512000
Operating mode	ASYNCHRONOUS	-	-	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	105 °C	-	-	105 °C	105 °C	105 °C	105 °C	105 °C
Minimum operating temperature	-40 °C	-	-	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
organize	512KX16	-	-	512KX16	512KX16	512KX16	512KX16	512KX16
Package body material	PLASTIC/EPOXY	-	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VFBGA	-	-	TSOP1	VFBGA	TSOP1	TSOP1	VFBGA
Package shape	RECTANGULAR	-	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	-	-	SMALL OUTLINE, THIN PROFILE	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Parallel/Serial	PARALLEL	-	-	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	240	-	-	240	260	240	260	240
Programming voltage	1.8 V	-	-	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
Certification status	Not Qualified	-	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1 mm	-	-	1.2 mm	1 mm	1.2 mm	1.2 mm	1 mm
Maximum supply voltage (Vsup)	1.95 V	-	-	1.95 V	1.95 V	1.95 V	1.95 V	1.95 V
Minimum supply voltage (Vsup)	1.65 V	-	-	1.65 V	1.65 V	1.65 V	1.65 V	1.65 V
Nominal supply voltage (Vsup)	1.8 V	-	-	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	YES	-	-	YES	YES	YES	YES	YES
technology	CMOS	-	-	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	-	-	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	TIN LEAD	-	-	TIN LEAD	Tin/Silver/Copper (Sn/Ag/Cu)	TIN LEAD	Matte Tin (Sn) - annealed	TIN LEAD
Terminal form	BALL	-	-	GULL WING	BALL	GULL WING	GULL WING	BALL
Terminal pitch	0.8 mm	-	-	0.5 mm	0.8 mm	0.5 mm	0.5 mm	0.8 mm
Terminal location	BOTTOM	-	-	DUAL	BOTTOM	DUAL	DUAL	BOTTOM
Maximum time at peak reflow temperature	30	-	-	30	40	30	40	30
type	NOR TYPE	-	-	NOR TYPE	NOR TYPE	NOR TYPE	NOR TYPE	NOR TYPE
width	6 mm	-	-	12 mm	6 mm	12 mm	12 mm	6 mm

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