VESD12A1A-HD1
www.vishay.com
Vishay Semiconductors
ESD Protection Diode in LLP1006-2L
FEATURES
• Ultra compact LLP1006-2L package
2
1
• Low package height < 0.4 mm
• 1-line ESD protection
• Low leakage current < 0.01 μA
• Low load capacitance C
D
= 22.5 pF
(V
R
= 6 V; f = 1 MHz)
• ESD immunity acc. IEC 61000-4-2
± 30 kV contact discharge
± 30 kV air discharge
• High surge current acc. IEC 61000-4-5 I
PP
> 8 A
• Soldering can be checked by standard vision inspection.
No X-ray necessary
20856
20855
MARKING
(example only)
XY
21121
• Pin plating NiPdAu (e4) no whisker growth
• e4 - precious metal (e.g. Ag, Au, NiPd, NiPdAu) (no Sn)
• PATENT(S):
www.vishay.com/patents
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
Bar = cathode marking
X = date code
Y = type code (see table below)
DESIGN SUPPORT TOOLS
click logo to get started
Models
Available
ORDERING INFORMATION
DEVICE NAME
VESD12A1A-HD1
ORDERING CODE
VESD12A1A-HD1-GS08
TAPED UNITS PER REEL
(8 mm TAPE on 7" REEL)
8000
MINIMUM ORDER QUANTITY
8000
PACKAGE DATA
DEVICE NAME
VESD12A1A-HD1
PACKAGE
NAME
LLP1006-2L
TYPE
CODE
K
WEIGHT
0.72 mg
MOLDING COMPOUND
FLAMMABILITY RATING
UL 94 V-0
MOISTURE
SENSITIVITY LEVEL
MSL level 1
(according J-STD-020)
SOLDERING
CONDITIONS
260 °C/10 s at terminals
ABSOLUTE MAXIMUM RATINGS VESD12A1A-HD1
PARAMETER
Peak pulse current
Peak pulse power
ESD immunity
Operating temperature
Storage temperature
TEST CONDITIONS
Acc. IEC 61000-4-5; t
P
= 8/20 μs; single shot
Acc. IEC 61000-4-5; t
P
= 8/20 μs; single shot
Contact discharge acc. IEC 61000-4-2; 10 pulses
Air discharge acc. IEC 61000-4-2; 10 pulses
Junction temperature
SYMBOL
I
PPM
P
PP
V
ESD
T
J
T
stg
VALUE
8
200
± 30
± 30
-40 to +125
-55 to +150
UNIT
A
W
kV
kV
°C
°C
PATENT(S):
www.vishay.com/patents
This Vishay product is protected by one or more United States and international patents.
Rev. 1.9, 16-May-17
Document Number: 81879
1
For technical questions, contact:
ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VESD12A1A-HD1
www.vishay.com
Vishay Semiconductors
ELECTRICAL CHARACTERISTICS VESD12A1A-HD1
(T
amb
= 25 °C, unless otherwise specified)
PARAMETER
Protection paths
Reverse stand-off voltage
Reverse voltage
Reverse current
Reverse breakdown voltage
Reverse clamping voltage
TEST CONDITIONS/REMARKS
Number of line which can be protected
Max. reverse working voltage
At I
R
= 0.1 μA
At V
R
= 12 V
At I
R
= 1 mA
At I
PP
= 1 A
At I
PP
= I
PPM
= 8 A
At I
PP
= 0.2 A
Forward clamping voltage
At I
PP
= 1 A
At I
PP
= I
PPM
= 8 A
Capacitance
At V
R
= 0 V; f = 1 MHz
At V
R
= 6 V; f = 1 MHz
SYMBOL
N
channel
V
RWM
V
R
I
R
V
BR
V
C
V
C
V
F
V
F
V
F
C
D
C
D
MIN.
-
-
12
-
13.5
-
-
-
-
-
-
-
TYP.
-
-
-
< 0.01
14
14.8
21
0.85
1.0
2.0
54
22.5
MAX.
1
12
-
0.1
16
17
24
1.2
1.3
2.5
65
-
UNIT
lines
V
V
μA
V
V
V
V
V
V
pF
pF
BiAs-MODE
(bidirectional asymmetrical protection mode)
With the VESD12A1A-HD1 one signal- or data-lines (L1) can be protected against voltage transients. With pin 1 connected to
ground and pin 2 connected to a signal- or data-line which has to be protected. As long as the voltage level on the data- or
signal-line is between 0 V (ground level) and the specified maximum reverse working voltage (V
RWM
) the protection diode
between data line and ground offers a high isolation to the ground line. The protection device behaves like an open switch.
As soon as any positive transient voltage signal exceeds the break through voltage level of the protection diode, the diode
becomes conductive and shorts the transient current to ground. Now the protection device behaves like a closed switch. The
clamping voltage (V
C
) is defined by the breakthrough voltage (V
BR
) level plus the voltage drop at the series impedance
(resistance and inductance) of the protection device.
Any negative transient signal will be clamped accordingly. The negative transient current is flowing in the forward direction of
the protection diode. The low forward voltage (V
F
) clamps the negative transient close to the ground level.
Due to the different clamping levels in forward and reverse direction the VESD12A1A-HD1 clamping behaviour is bidirectional
and asymmetrical (BiAs).
L1
2
BiAs
Ground
1
20925
Rev. 1.9, 16-May-17
Document Number: 81879
2
For technical questions, contact:
ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VESD12A1A-HD1
www.vishay.com
TYPICAL CHARACTERISTICS
(T
amb
= 25 °C, unless otherwise specified)
Axis Title
120
Rise time = 0.7 ns to 1 ns
Vishay Semiconductors
10000
100
100
80
2nd line
I
ESD
(%)
60
53
10
1000
1st line
2nd line
BiAs-mode
I
F
(mA)
1
40
20
27
100
0.1
0.01
10
0
-10 0
20557
10 20 30 40 50 60 70 80 90 100
t (ns)
2nd line
0.001
0.5
21289
0.55 0.6
0.65 0.7
0.75 0.8
0.85
V
F
(V)
Fig. 1 - ESD Discharge Current Wave Form
acc. IEC 61000-4-2 (330
Ω/150
pF)
Axis Title
10000
100
80
1000
2nd line
I
PPM
(%)
20 µs to 50 %
8 µs to 100 %
Fig. 4 - Typical Forward Current I
F
vs. Forward Voltage V
F
16
14
12
1st line
2nd line
10
BiAs-mode
V
R
(V)
60
40
20
0
0
8
6
4
2
100
10
10
20
t (µs)
2nd line
30
40
21290
0
0.01
0.1
1
10
100
1000 10 000
20548
I
R
(µA)
Fig. 5 - Typical Reverse Voltage V
R
vs.
Reverse Current I
R
Fig. 2 - 8/20 μs Peak Pulse Current Wave Form
acc. IEC 61000-4-5
60
f = 1 MHz
50
40
30
20
10
0
0
21288
25
Measured acc. IEC 61000-4-5
(8/20 µs - wave form)
20
Reverse
V
F
/V
C
(V)
C
D
(pF)
BiAs-mode
15
10
V
C
5
Forward
0
2
4
6
8
10
12
21291
0
1
2
3
4
5
6
7
8
9
V
R
(V)
I
PP
(A)
Fig. 6 - Typical Clamping Voltage vs.
Peak Pulse Current I
PP
Fig. 3 - Typical Capacitance C
D
vs. Reverse Voltage V
R
Rev. 1.9, 16-May-17
Document Number: 81879
3
For technical questions, contact:
ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VESD12A1A-HD1
www.vishay.com
Vishay Semiconductors
70
60
50
40
30
20
10
0
-10
-20
-30
-40
-10 0
21292
Reverse
Acc. IEC 61000-4-2
+ 8 kV
contact discharge
V
C-ESD
(V)
10 20 30 40 50 60 70 80 90
t (ns)
Fig. 7 - Typical Clamping Performance at + 8 kV
Contact Discharge (acc. IEC 61000-4-2)
50
40
30
20
10
0
- 10
- 20
- 30
- 40
- 50
- 60
- 10 0
21293
forward
acc. IEC 61000-4-2
- 8 kV
contact discharge
V
C-ESD
(V)
10 20 30 40 50 60 70 80 90
t (ns)
Fig. 8 - Typical Clamping Performance at - 8 kV
Contact Discharge (acc. IEC 61000-4-2)
250
200
150
positive discharge
acc. IEC 61000-4-2
contact discharge
V
C-ESD
(V)
100
50
0
- 50
V
C-ESD
- 100
negative discharge
- 150
- 200
0
21294
5
10
15
20
25
30
V
ESD
(kV)
Fig. 9 - Typical Clamping Voltage at ± ESD
Contact Discharge (acc. IEC 61000-4-2)
Rev. 1.9, 16-May-17
Document Number: 81879
4
For technical questions, contact:
ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VESD12A1A-HD1
www.vishay.com
PACKAGE DIMENSIONS
in millimeters (inches):
LLP1006-2L
0.3 [0.012]
0.2 [0.008]
0.25 [0.010]
0.15 [0.006]
Vishay Semiconductors
0.55 [0.022]
0.45 [0.018]
0.45 [0.018]
0.35 [0.014]
0.65 [0.026]
0.55 [0.022]
0.4 [0.016]
0.33 [0.013]
0.05 [0.002]
0 [0.000]
Orientation identification
1.05 [0.041]
0.95 [0.037]
Foot print recommendation:
0.6 [0.024]
0.5 [0.020]
0.2 [0.008]
Solder
resist mask
1 [0.039]
Solder
pad
0.5 [0.020]
0.05 [0.002]
0.25 [0.010]
Pad Design Patented:
( P US 9.018.537 B2)
Document no.:
S8-V-3906.04-005
(4)
Rev. 7 - Date: 11.May 2016
20812
Unreeling direction
0.125 [0.005] ref.
LLP1006-2X
Orientation
identification
Top view
S8-V-3906.04-017
(4)
02.05.2017
22965
Pad layout - view from top
seen
at bottom
side
Rev. 1.9, 16-May-17
Document Number: 81879
5
For technical questions, contact:
ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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