PD - 91722B
IRFE210
REPETITIVE A ALANCHE AND dv/dt RATED
V
JANTX2N6784U
HEXFET TRANSISTORS
JANTXV2N6784U
SURFACE MOUNT (LCC-18)
[REF:MIL-PRF-19500/556]
200V, N-CHANNEL
Product Summary
Part Number
IRFE210
B
VDSS
200V
R
DS(on)
1.5Ω
I
D
2.25A
The leadless chip carrier (LCC) package represents the
logical next step in the continual evolution of surface
mount technology. Desinged to be a close replacement
for the TO-39 package, the LCC will give designers the
extra flexibility they need to increase circuit board den-
sity. International Rectifier has engineered the LCC pack-
age to meet the specific needs of the power market by
increasing the size of the bottom source pad, thereby
enhancing the thermal and electrical performance. The
lid of the package is grounded to the source to reduce
RF interference.
LCC-18
Features:
!
!
!
!
!
!
!
!
Surface Mount
Small Footprint
Alternative to TO-39 Package
Hermetically Sealed
Dynamic dv/dt Rating
Avalanche Energy Rating
Simple Drive Requirements
Light Weight
Absolute Maximum Ratings
Parameter
ID @ VGS = 10V, TC = 25°C
ID @ VGS = 10V, TC = 100°C
I DM
PD @ TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current
➀
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
➁
Avalanche Current
➀
Repetitive Avalanche Energy
➀
Peak Diode Recovery dv/dt
➂
Operating Junction
Storage Temperature Range
Pckg. Mounting Surface Temp.
Weight
For footnotes refer to the last page
2.25
1.5
9.0
15
0.12
±20
20
-
-
3.9
-55 to 150
300 (for 5 S)
0.42(typical)
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
o
C
g
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1
1/17/01
IRFE210
Electrical Characteristics
Parameter
BVDSS
∆BV
DSS/∆TJ
RDS(on)
VGS(th)
gfs
IDSS
@ Tj = 25°C (Unless Otherwise Specified)
Min
200
—
—
—
2.0
1.4
—
—
—
—
—
—
—
—
—
—
—
—
Typ Max Units
—
0.23
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6.1
—
—
1.5
1.725
4.0
—
25
250
100
-100
6.2
1.2
5.0
15
20
30
20
—
V
V/°C
Ω
V
S( )
µA
nA
nC
Ω
Test Conditions
VGS = 0V, ID = 1.0mA
Reference to 25°C, ID = 1.0mA
VGS = 10V, ID =1.5A➃
VGS =10V, ID =2.25A
➃
VDS = VGS, ID =250µA
VDS > 15V, IDS =1.5A➃
VDS=160V, VGS=0V
VDS =160V
VGS = 0V, TJ = 125°C
VGS =20V
VGS =-20V
VGS =10V, ID= 2.25A
VDS =100V
VDD =100V, ID =2.25A,
RG =7.5Ω
Drain-to-Source Breakdown Voltage
Temperature Coefficient of Breakdown
Voltage
Static Drain-to-Source On-State
Resistance
Gate Threshold Voltage
Forward Transconductance
Zero Gate Voltage Drain Current
IGSS
IGSS
Qg
Qgs
Qgd
td
(on)
tr
td
(off)
tf
LS + LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
ns
nH
Measured from the center of
drain pad to center of source
pad
VGS = 0V, VDS =25V
f = 1.0MHz
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
150
57
15
—
—
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS
ISM
VSD
t rr
QRR
ton
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode)
➀
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min Typ Max Units
—
—
—
—
—
—
—
—
—
—
2.25
9.0
1.5
350
0.66
Test Conditions
A
V
nS
µc
T
j
= 25°C, IS =2.25A, VGS = 0V
➃
Tj = 25°C, IF =2.25A, di/dt
≤100A/µs
VDD
≤50V
➃
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC
RthJ-PCB
Junction to Case
Junction to PC Board
Min Typ Max Units
—
—
—
—
8.3
°C/W
27"
" "
Test Conditions
Soldered to a copper clad PC board
For footnotes refer to the last page
2
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IRFE210
10
I
D
, Drain-to-Source Current (A)
1
I
D
, Drain-to-Source Current (A)
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
1
4.5V
4.5V
0.1
0.1
20µs PULSE WIDTH
T
J
= 25
°
C
1
10
100
0.1
0.1
20µs PULSE WIDTH
T
J
= 150
°
C
1
10
100
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
10
2.5
I
D
, Drain-to-Source Current (A)
T
J
= 25
°
C
T
J
= 150
°
C
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= 2.25A
2.0
1.5
1
1.0
0.5
0.1
4.0
V DS = 50V
20µs PULSE WIDTH
5.0
6.0
7.0
8.0
9.0
10.0
0.0
-60 -40 -20
V
GS
= 10V
0
20
40
60
80 100 120 140 160
V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (
°
C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
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3
IRFE210
300
V
GS
, Gate-to-Source Voltage (V)
240
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd ,
C
ds
SHORTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
20
I
D
= 2.25A
V
DS
= 160V
V
DS
= 100V
V
DS
= 40V
16
C, Capacitance (pF)
180
Ciss
12
120
8
Coss
60
4
Crss
0
1
10
100
0
FOR TEST CIRCUIT
SEE FIGURE 13
0
2
4
6
8
V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
10
100
I
SD
, Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
T
J
= 150
°
C
I
D
, Drain Current (A)
10
10us
1
100us
T
J
= 25
°
C
1
1ms
0.1
0.4
V
GS
= 0 V
0.6
0.8
1.0
1.2
1.4
0.1
T
C
= 25 °C
T
J
= 150 °C
Single Pulse
1
10
100
10ms
V
SD
,Source-to-Drain Voltage (V)
1000
V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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IRFE210
2.5
V
DS
2.0
R
D
I
D
, Drain Current (A)
V
GS
R
G
D.U.T.
+
1.5
-
V
DD
10V
1.0
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
0.5
Fig 10a.
Switching Time Test Circuit
V
DS
0.0
90%
25
50
75
100
125
150
T
C
, Case Temperature ( °C)
10%
V
GS
Fig 9.
Maximum Drain Current Vs.
Case Temperature
t
d(on)
t
r
t
d(off)
t
f
Fig 10b.
Switching Time Waveforms
10
D = 0.50
Thermal Response (Z
thJC
)
0.20
1
0.10
0.05
0.02
0.01
0.1
SINGLE PULSE
(THERMAL RESPONSE)
P
DM
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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