EEWORLDEEWORLDEEWORLD

Part Number

Search

DS1010S-500

Description
Delay Lines / Timing Elements
Categorylogic    logic   
File Size59KB,6 Pages
ManufacturerMaxim
Websitehttps://www.maximintegrated.com/en.html
Download Datasheet Parametric View All

DS1010S-500 Online Shopping

Suppliers Part Number Price MOQ In stock  
DS1010S-500 - - View Buy Now

DS1010S-500 Overview

Delay Lines / Timing Elements

DS1010S-500 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMaxim
Parts packaging codeSOIC
package instruction0.300 INCH, SOIC-16
Contacts16
Reach Compliance Codenot_compliant
ECCN codeEAR99
Other featuresBOTH LEADING & TRAILING EDGE ACCURACY; MAX FAN OUT OF 10 74LS LOAD PER OUTPUT
series1010
Input frequency maximum value (fmax)1.25 MHz
JESD-30 codeR-PDSO-G16
JESD-609 codee0
length10.3 mm
Logic integrated circuit typeSILICON DELAY LINE
Humidity sensitivity level1
Number of functions1
Number of taps/steps10
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)245
power supply5 V
Maximum supply current (ICC)75 mA
programmable delay lineNO
Prop。Delay @ Nom-Sup500 ns
Certification statusNot Qualified
Maximum seat height2.65 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Total delay nominal (td)500 ns
width7.5 mm
Base Number Matches1
DS1010
10-Tap Silicon Delay Line
www.dalsemi.com
FEATURES
All-silicon time delay
10 taps equally spaced
Delays are stable and precise
Leading and trailing edge accuracy
Delay tolerance ±5% or ±2 ns, whichever is
greater
Economical
Auto-insertable, low profile
Standard 14-pin DIP or 16-pin SOIC
Low-power CMOS
TTL/CMOS-compatible
Vapor phase, IR and wave solderable
Custom delays available
Fast turn prototypes
IN1
NC
TAP 2
TAP 4
TAP 6
TAP 8
GND
PIN ASSIGNMENT
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
TAP 1
IN1
TAP 3
TAP 5
TAP 7
TAP 9
TAP 10
NC
NC
TAP 2
TAP 4
TAP 6
TAP 8
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
NC
TAP 1
TAP 3
TAP 5
TAP 7
TAP 9
TAP 10
DS1010 14-Pin DIP (300-mil)
See Mech. Drawings Section
DS1010S 16-Pin SOIC
(300-mil)
See Mech. Drawings Section
PIN DESCRIPTION
TAP 1 - TAP 10
V
CC
GND
NC
IN
- TAP Output Number
- 5 Volts
- Ground
- No Connection
- Input
DESCRIPTION
The DS1010 series delay line has ten equally spaced taps providing delays from 5 ns to 500 ns. The
devices are offered in a standard 14-pin DIP which is pin-compatible with hybrid delay lines.
Alternatively, a 16-pin SOIC is available for surface mount technology which reduces PC board area.
Since the DS1010 is an all-silicon solution, better economy is achieved when compared to older methods
using hybrid techniques. The DS1010 series delay lines provide a nominal accuracy of ±5% or ±2 ns,
whichever is greater. The DS1010 reproduces the input logic state at the TAP 10 output after a fixed
delay as specified by the dash number extension of the part number. The DS1010 is designed to produce
both leading and trailing edge with equal precision. Each tap is capable of driving up to 10 74LS type
loads. Dallas Semiconductor can customize standard products to meet special needs. For special requests
and rapid delivery, call (972) 371-4348.
1 of 6
111799
The administrator deleted the post randomly and the review failed? ?
I post technical posts about FPGA learning every day, and I work hard to write or share information, and try my best to create a learning atmosphere in the forum, but the administrators don’t approve ...
大辉哥0614 Talking
Please help me find the shortcomings of the program and how to improve it. . . .
/*Design project: p1.1 p2.1 button generates interruption* Designer: * Design time: 2016.1.6 * Hardware description: * Software description: * Description: The main program executes the external runni...
HI唐辉 Electronics Design Contest
Does anyone have a programmable frequency divider chip?
I want to divide the clock signal generated by the crystal oscillator. Can you tell me if there is a programmable frequency division chip?I have been looking for it for a long time but couldn't find i...
jialaolian MCU
【TM4】About TM4 AHB bus
I have a few questions and hope that the seniors in the forum can give me some advice (I am using TM4C123GH6PM) 1. The parameters of the SysCtlGPIOAHBEnable function, according to the definition in sy...
请给我C代码 Microcontroller MCU
CircuitPython 5.1.0-rc.0 released
New features and improvements since 5.0.0ulab, a fast vector module similar to numpy (#2583 etc.). Thanks @v923z, @jeplerPerforms math operations 10 to 50 times faster than original CircuitPython Enab...
dcexpert MicroPython Open Source section
One egg a day...
...
sunrise41 Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1759  2661  380  1100  806  36  54  8  23  17 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号