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8SLVP1208ANBGI

Description
Clock Drivers & Distribution 2:8 LVPECL Output Fanout Buffer
Categorysemiconductor    Analog mixed-signal IC   
File Size690KB,23 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
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Clock Drivers & Distribution 2:8 LVPECL Output Fanout Buffer

8SLVP1208ANBGI Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerIDT (Integrated Device Technology, Inc.)
Product CategoryClock Drivers & Distribution
RoHSDetails
Mounting StyleSMD/SMT
Package / CaseVFQFPN-28
PackagingTray
Height0.8 mm
Length5 mm
Width5 mm
Factory Pack Quantity490
Low Phase Noise, 1-to-8, 3.3V, 2.5V
LVPECL Output Fanout Buffer
8SLVP1208
DATA SHEET
General Description
The 8SLVP1208 is a high-performance differential LVPECL fanout
buffer. The device is designed for the fanout of high-frequency, very
low additive phase-noise clock and data signals. The 8SLVP1208 is
characterized to operate from a 3.3V and 2.5V power supply.
Guaranteed output-to-output and part-to-part skew characteristics
make the 8SLVP1208 ideal for those clock distribution applications
demanding well-defined performance and repeatability. Two
selectable differential inputs and eight low skew outputs are available.
The integrated bias voltage generators enables easy interfacing of
single-ended signals to the device inputs. The device is optimized for
low power consumption and low additive phase noise.
Features
Eight low skew, low additive jitter LVPECL output pairs
Two selectable, differential clock input pairs
Differential pairs can accept the following differential input
levels: LVDS, LVPECL, CML
Maximum input clock frequency: 2GHz
LVCMOS interface levels for the control input (input select)
Output skew: 28ps (typical)
Propagation delay: 410ps (maximum)
Low additive phase jitter, RMS: 54.1fs (maximum)
(f
REF
= 156.25MHz, V
PP
= 1V, 12kHz - 20MHz)
Full 3.3V and 2.5V supply voltage
Maximum device current consumption (I
EE
): 141mA
Available in lead-free (RoHS 6), 28-Lead VFQFN package
-40°C to 85°C ambient operating temperature
Differential PCLK0, nPCLK0 and PCLK1, nPCLK1 pairs can also
accept single-ended LVCMOS levels. See Applications section
Wiring the Differential Input to Accept Single-Ended Levels
(Figure
1A
and
Figure 1B)
Block Diagram
V
CC
Pulldown
Pullup/Pulldown
Pin Assignment
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
PCLK0
nPCLK0
0
V
CC
Pulldown
Pullup/Pulldown
1
f
REF
PCLK1
nPCLK1
SEL
V
REF
Pulldown
Voltage
Reference
Q6
nQ6
Q7
nQ7
8SLVP1208
28-Lead LFCSP
5mm x 5mm x 0.75mm package body
NB Package
Top View
8SLVP1208 REVISION 1 08/28/14
1
©2014 Integrated Device Technology, Inc.

8SLVP1208ANBGI Related Products

8SLVP1208ANBGI
Description Clock Drivers & Distribution 2:8 LVPECL Output Fanout Buffer
Product Attribute Attribute Value
Manufacturer IDT (Integrated Device Technology, Inc.)
Product Category Clock Drivers & Distribution
RoHS Details
Mounting Style SMD/SMT
Package / Case VFQFPN-28
Packaging Tray
Height 0.8 mm
Length 5 mm
Width 5 mm
Factory Pack Quantity 490
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