VS-80RIA...PbF, VS-81RIA...PbF, VS-82RIA...PbF Series
www.vishay.com
Vishay Semiconductors
Phase Control Thyristors
(Stud Version), 80 A
FEATURES
• Hermetic glass-metal seal
• International standard case TO-94 (TO-209AC)
• Designed and qualified for industrial level
TO-94 (TO-209AC)
• Material categorization: For definitions of compliance
please see
www.vishay.com/doc?99912
TYPICAL APPLICATIONS
• DC motor controls
PRIMARY CHARACTERISTICS
I
T(AV)
V
DRM
/V
RRM
V
TM
I
GT
T
J
Package
Circuit configuration
80 A
400 V, 800 V, 1200 V
1.60 V
120 mA
-40 °C to +125 °C
TO-94 (TO-209AC)
Single SCR
• Controlled DC power supplies
• AC controllers
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
I
T(AV)
I
T(RMS)
I
TSM
I
2
t
V
DRM
/V
RRM
t
q
T
J
Typical
50 Hz
60 Hz
50 Hz
60 Hz
T
C
TEST CONDITIONS
VALUES
80
85
125
1900
1990
18
16
400 to 1200
110
-40 to +125
kA
2
s
V
μs
°C
A
UNITS
A
°C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE NUMBER
VOLTAGE
CODE
40
VS-80RIA
VS-81RIA
80
120
V
DRM
/V
RRM
, MAXIMUM REPETITIVE
PEAK AND OFF-STATE VOLTAGE
V
400
800
1200
V
RSM
, MAXIMUM NON-REPETITIVE
PEAK VOLTAGE
V
500
900
1300
15
I
DRM
/I
RRM
MAXIMUM
AT T
J
= 125 °C
mA
Revision: 27-Sep-17
Document Number: 94392
1
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-80RIA...PbF, VS-81RIA...PbF, VS-82RIA...PbF Series
www.vishay.com
Vishay Semiconductors
SYMBOL
I
T(AV)
I
T(RMS)
TEST CONDITIONS
180° conduction, half sine wave
DC at 75 °C case temperature
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
No voltage
reapplied
100 % V
RRM
reapplied
No voltage
100 % V
RRM
reapplied
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state current
at case temperature
Maximum RMS on-state current
Maximum peak, one-cycle
non-repetitive surge current
VALUES
80
85
125
1900
1990
1600
Sinusoidal half wave,
initial T
J
= T
J
maximum
1675
18
16
12.7
11.7
180.5
0.99
1.13
2.29
1.84
1.60
200
400
kA
2
s
V
m
V
mA
kA
2
s
A
UNITS
A
°C
I
TSM
Maximum I
2
t for fusing
I
2
t
Maximum I
2
t
for fusing
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
Maximum holding current
Typical latching current
I
2
t
V
T(TO)1
V
T(TO)2
r
t1
r
t2
V
TM
I
H
I
L
t = 0.1 ms to 10 ms, no voltage reapplied
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
I
pk
= 250 A, T
J
= 25 °C, t
p
= 10 ms sine pulse
T
J
= 25 °C, anode supply 12 V resistive load
SWITCHING
PARAMETER
Maximum non-repetitive rate of
rise of turned-on current
Typical delay time
Typical turn-off time
SYMBOL
dI/dt
t
d
t
q
TEST CONDITIONS
T
J
= 125 °C, V
d
= Rated V
DRM
, I
TM
= 2 x dI/dt snubber
0.2 μF, 15
,
gate pulse: 20 V, 65
,
t
p
= 6 μs, t
r
= 0.5 μs
Per JEDEC standard RS-397, 5.2.2.6.
Gate pulse: 10 V, 15
source, t
p
= 6 μs, t
r
= 0.1 μs,
V
d
= Rated V
DRM
, I
TM
= 50 Adc, T
J
= 25 °C
I
TM
= 50 A, T
J
= T
J
maximum, dI/dt = -5 A/μs, V
R
= 50 V,
dV/dt = 20 V/μs, gate bias: 0 V 25
,
t
p
= 500 μs
VALUES
300
1
μs
110
UNITS
A/μs
BLOCKING
PARAMETER
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and
off-state leakage current
SYMBOL
dV/dt
I
RRM
,
I
DRM
TEST CONDITIONS
T
J
= 125 °C exponential to 67 % rated V
DRM
T
J
= 125 °C rated V
DRM
/V
RRM
applied
VALUES
500
15
UNITS
V/μs
mA
Revision: 27-Sep-17
Document Number: 94392
2
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-80RIA...PbF, VS-81RIA...PbF, VS-82RIA...PbF Series
www.vishay.com
Vishay Semiconductors
TRIGGERING
PARAMETER
Maximum peak gate power
Maximum average gate power
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
Maximum DC gate current required to trigger
SYMBOL
P
GM
P
G(AV)
I
GM
+ V
GM
- V
GM
T
J
= - 40 °C
I
GT
T
J
= 25 °C
T
J
= 125 °C
T
J
= - 40 °C
Maximum DC gate voltage required to trigger
DC gate current not to trigger
DC gate voltage not to trigger
V
GT
I
GD
V
GD
T
J
= T
J
maximum
T
J
= 25 °C
T
J
= 125 °C
Maximum gate current/voltage not to
trigger is the maximum value which
will not trigger any unit with rated
V
DRM
anode to cathode applied
Maximum required gate trigger/
current/voltage are the lowest value
which will trigger all units 6 V anode
to cathode applied
T
J
= T
J
maximum, t
p
5 ms
TEST CONDITIONS
T
J
= T
J
maximum, t
p
5 ms
T
J
= T
J
maximum, f = 50 Hz, d% = 50
VALUES
12
3
3
20
10
270
120
60
3.5
2.5
1.5
6
0.25
mA
V
V
mA
UNITS
W
A
V
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
Maximum operating junction
temperature range
Maximum storage temperature range
Maximum thermal resistance,
junction to case
Maximum thermal resistance,
case to heatsink
SYMBOL
T
J
T
Stg
R
thJC
R
thCS
DC operation
Mounting surface, smooth, flat and greased
Non-lubricated threads
Mounting torque, ± 10 %
Lubricated threads
Approximate weight
Case style
See dimensions - link at the end of datasheet
TEST CONDITIONS
VALUES
- 40 to 125
- 40 to 150
0.30
K/W
0.1
15.5
(137)
14
(120)
130
UNITS
°C
N·m
(lbf · in)
g
TO-94 (TO-209AC)
R
thJC
CONDUCTION
CONDUCTION ANGLE
180°
120°
90°
60°
30°
SINUSOIDAL CONDUCTION
0.042
0.050
0.064
0.095
0.164
RECTANGULAR CONDUCTION
0.030
0.052
0.070
0.100
0.165
T
J
= T
J
maximum
K/W
TEST CONDITIONS
UNITS
Note
• The table above shows the increment of thermal resistance R
thJC
when devices operate at different conduction angles than DC
Revision: 27-Sep-17
Document Number: 94392
3
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-80RIA...PbF, VS-81RIA...PbF, VS-82RIA...PbF Series
www.vishay.com
Vishay Semiconductors
Maximum Allowable Case T
emperature (°C)
130
120
110
Conduction Period
Maximum Allowable Case T
emperature (°C)
130
80RIA S
eries
R
thJC
(DC) = 0.30 K/W
120
80RIA S
eries
R
thJC
(DC) = 0.30 K/W
110
Conduc tion Angle
100
90
30°
80
70
0
20
40
60
80
100
120
140
Average On-state Current (A)
60°
90°
120°
180°
DC
100
30°
60°
90°
120°
180°
90
80
0
10 20
30 40
50 60 70
80 90
Average On-s
tate Current (A)
Fig. 1 - Current Ratings Characteristics
Fig. 2 - Current Ratings Characteristics
Maximum Average On-s
tate Power Loss (W)
120
A
hS
R
t
110
100
90
80
70
60
50
180°
120°
90°
60°
30°
RMSLimit
6
0.
W
K/
=
/W
4K
0.
1
K/
W
e lt
-D
a
1.4
K/
W
2K
/W
R
40
30
20
Conduction Angle
3 K/
W
10
0
0
10
20
30
40
80RIA S
eries
T = 125°C
J
50
60
70
80
0
5 K/ W
25
50
75
100
125
Average On-state Current (A)
Maximum Allowable Ambient T
emperature (°C)
Fig. 3 - On-State Power Loss Characteristics
Maximum Average On-state Power Los (W)
s
180
160
140
120
100
80
60
40
20
0
DC
180°
120°
90°
60°
30°
R
th
S
A
=
0.
6K
/W
0.
4
K/
W
-D
el
ta
1K
/W
R
RMSLimit
Conduc tion Period
1. 4
K/ W
W
3 K/ W
2 K/
80RIA S
eries
T = 125°C
J
0
20
40
60
80
100
120
5 K/ W
140
0
25
50
75
100
125
Average On-state Current (A)
Maximum Allowable Ambient T
emperature (°C)
Fig. 4 - On-State Power Loss Characteristics
Revision: 27-Sep-17
Document Number: 94392
4
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-80RIA...PbF, VS-81RIA...PbF, VS-82RIA...PbF Series
www.vishay.com
Vishay Semiconductors
Peak Half S Wave On-state Current (A)
ine
2000
Maximum Non Repetitive Surge Current
1900
Versus Pulse Train Duration. Control
1800 Of Conduction May Not Be Maintained.
Initial T
J
= 125°C
1700
No Voltage Reapplied
1600
Rated V
RRM
Reapplied
1500
1400
1300
1200
1100
1000
900
80RIA S
eries
800
700
0.01
Peak Half S Wave On-s
ine
tate Current (A)
1800
1600
At Any Rated Load Condition And With
Rated V
RRM
Applied Following Surge.
Initial T
J
= 125°C
at 60 Hz 0.0083 s
at 50 Hz 0.0100 s
1400
1200
1000
80R S
IA eries
800
1
10
100
Number Of Equa l Amplitude Half Cycle Current Pulses (N)
0.1
1
Puls T
e rain Duration (s)
Fig. 5 - Maximum Non-Repetitive Surge Current
Fig. 6 - Maximum Non-Repetitive Surge Current
10000
Instantaneous On-state Current (A)
1000
100
T = 25°C
J
T = 125°C
J
10
80RIA Series
1
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Instantaneous On-state Voltage (V)
Fig. 7 - On-State Voltage Drop Characteristics
(K/ W)
1
Steady State Value
R
thJC
= 0.30 K/W
(DC Operation)
0.1
T
ransient T
hermal Impedance Z
thJC
0.01
80RIA Series
0.001
0.0001
0.001
0.01
0.1
1
10
S uare Wave Pulse Duration (s)
q
Fig. 8 - Thermal Impedance Z
thJC
Characteristics
Revision: 27-Sep-17
Document Number: 94392
5
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
京公网安备 11010802033920号
EEWORLD
