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Z8023010PSG

Description
Network Controller & Processor ICs 10MHz CMOS ESCC
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size798KB,118 Pages
ManufacturerZilog, Inc.
Websitehttps://www.zilog.com/
Environmental Compliance
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Z8023010PSG Overview

Network Controller & Processor ICs 10MHz CMOS ESCC

Z8023010PSG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerZilog, Inc.
Parts packaging codeDIP
package instructionDIP, DIP40,.6
Contacts40
Reach Compliance Codeunknown
Other featuresMODEM CONTROL I/OS USABLE AS GENERAL PURPOSE I/OS; 10 X 19 FRAME STATUS FIFO
Address bus width8
boundary scanNO
Bus compatibilityZ-BUS
maximum clock frequency10 MHz
letter of agreementASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC
Data encoding/decoding methodsNRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate0.3125 MBps
External data bus width8
JESD-30 codeR-PDIP-T40
JESD-609 codee3
length52.325 mm
low power modeNO
Number of DMA channels
Number of I/O lines
Number of serial I/Os2
Number of terminals40
On-chip data RAM width
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP40,.6
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
RAM (number of words)0
Maximum seat height4.24 mm
Maximum slew rate12 mA
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width15.24 mm
uPs/uCs/peripheral integrated circuit typeSERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Z80230/Z85230/L
Enhanced Serial
Communications Controller
Product Specification
PS005308-0609
Copyright ©2009 by Zilog
®
, Inc. All rights reserved.
www.zilog.com

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Description Network Controller & Processor ICs 10MHz CMOS ESCC Network Controller & Processor ICs 16 Mhz ESCC Network Controller & Processor ICs 20MHz ESCC Network Controller & Processor ICs 10MHz ESCC XTEMP Network Controller & Processor ICs 16MHz CMOS ESCC Network Controller & Processor ICs 8MHz ESCC XTEMP Network Controller & Processor ICs 16MHz CMOS ESCC Network Controller & Processor ICs 8MHz ESCC Network Controller & Processor ICs 10MHz CMOS ESCC Network Controller & Processor ICs 8MHz ESCC
Is it lead-free? Lead free - Lead free Lead free - Lead free - Lead free Lead free Lead free
Is it Rohs certified? conform to - conform to conform to - conform to - conform to conform to conform to
Maker Zilog, Inc. - Zilog, Inc. - - Zilog, Inc. - Zilog, Inc. Zilog, Inc. Zilog, Inc.
Parts packaging code DIP LCC DIP LCC - DIP - DIP LCC LCC
package instruction DIP, DIP40,.6 QCCJ, LDCC44,.7SQ DIP, DIP40,.6 QCCJ, LDCC44,.7SQ - DIP, DIP40,.6 - DIP, DIP40,.6 QCCJ, LDCC44,.7SQ QCCJ, LDCC44,.7SQ
Contacts 40 44 40 44 - 40 - 40 44 44
Reach Compliance Code unknown unknown unknown unknown - unknown - unknown unknown unknown
boundary scan NO NO NO NO - NO - NO NO NO
Bus compatibility Z-BUS Z-BUS Z-BUS Z-BUS - Z-BUS - Z-BUS Z-BUS Z-BUS
maximum clock frequency 10 MHz - 20 MHz 10 MHz - 8 MHz - 8 MHz 10 MHz 8 MHz
letter of agreement ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC - ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC - ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC
Data encoding/decoding methods NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER) NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER) NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER) NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER) - NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER) - NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER) NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER) NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate 0.3125 MBps - 0.625 MBps 0.3125 MBps - 0.25 MBps - 0.25 MBps 0.3125 MBps 0.25 MBps
External data bus width 8 8 8 8 - 8 - 8 8 8
JESD-30 code R-PDIP-T40 S-PQCC-J44 R-PDIP-T40 S-PQCC-J44 - R-PDIP-T40 - R-PDIP-T40 S-PQCC-J44 S-PQCC-J44
JESD-609 code e3 - e3 e3 - e3 - e3 e3 e3
length 52.325 mm 16.585 mm 52.325 mm 16.585 mm - 52.325 mm - 52.325 mm 16.585 mm 16.585 mm
low power mode NO NO NO NO - NO - NO NO NO
Number of serial I/Os 2 2 2 2 - 2 - 2 2 2
Number of terminals 40 44 40 44 - 40 - 40 44 44
Maximum operating temperature 70 °C 70 °C 70 °C 100 °C - 100 °C - 70 °C 70 °C 70 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code DIP QCCJ DIP QCCJ - DIP - DIP QCCJ QCCJ
Encapsulate equivalent code DIP40,.6 LDCC44,.7SQ DIP40,.6 LDCC44,.7SQ - DIP40,.6 - DIP40,.6 LDCC44,.7SQ LDCC44,.7SQ
Package shape RECTANGULAR SQUARE RECTANGULAR SQUARE - RECTANGULAR - RECTANGULAR SQUARE SQUARE
Package form IN-LINE CHIP CARRIER IN-LINE CHIP CARRIER - IN-LINE - IN-LINE CHIP CARRIER CHIP CARRIER
Peak Reflow Temperature (Celsius) NOT SPECIFIED - NOT SPECIFIED 260 - NOT SPECIFIED - NOT SPECIFIED 260 260
power supply 5 V 3.3 V 5 V 5 V - 5 V - 5 V 5 V 5 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified - Not Qualified - Not Qualified Not Qualified Not Qualified
Maximum seat height 4.24 mm 4.57 mm 4.24 mm 4.57 mm - 4.24 mm - 4.24 mm 4.57 mm 4.57 mm
Maximum slew rate 12 mA 6 mA 20 mA 12 mA - 10 mA - 10 mA 12 mA 10 mA
Maximum supply voltage 5.5 V 3.6 V 5.5 V 5.5 V - 5.5 V - 5.5 V 5.5 V 5.5 V
Minimum supply voltage 4.5 V 3 V 4.5 V 4.5 V - 4.5 V - 4.5 V 4.5 V 4.5 V
Nominal supply voltage 5 V 3.3 V 5 V 5 V - 5 V - 5 V 5 V 5 V
surface mount NO YES NO YES - NO - NO YES YES
technology CMOS CMOS CMOS CMOS - CMOS - CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL INDUSTRIAL - INDUSTRIAL - COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Matte Tin (Sn) - Matte Tin (Sn) Matte Tin (Sn) - Matte Tin (Sn) - Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn)
Terminal form THROUGH-HOLE J BEND THROUGH-HOLE J BEND - THROUGH-HOLE - THROUGH-HOLE J BEND J BEND
Terminal pitch 2.54 mm 1.27 mm 2.54 mm 1.27 mm - 2.54 mm - 2.54 mm 1.27 mm 1.27 mm
Terminal location DUAL QUAD DUAL QUAD - DUAL - DUAL QUAD QUAD
Maximum time at peak reflow temperature NOT SPECIFIED - NOT SPECIFIED 40 - NOT SPECIFIED - NOT SPECIFIED 40 40
width 15.24 mm 16.585 mm 15.24 mm 16.585 mm - 15.24 mm - 15.24 mm 16.585 mm 16.585 mm
uPs/uCs/peripheral integrated circuit type SERIAL IO/COMMUNICATION CONTROLLER, SERIAL SERIAL IO/COMMUNICATION CONTROLLER, SERIAL SERIAL IO/COMMUNICATION CONTROLLER, SERIAL SERIAL IO/COMMUNICATION CONTROLLER, SERIAL - SERIAL IO/COMMUNICATION CONTROLLER, SERIAL - SERIAL IO/COMMUNICATION CONTROLLER, SERIAL SERIAL IO/COMMUNICATION CONTROLLER, SERIAL SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
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