Z8023010VSG datasheet, PDF - EEWORLD Datasheet

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Z8023010VSG: DescriptionNetwork Controller & Processor ICs 10MHz CMOS ESCC; CategoryThe embedded processor and controller Microcontrollers and processors; File Size798KB，118 Pages; ManufacturerZilog, Inc.; Websitehttps://www.zilog.com/; Environmental Compliance

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Z8023010VSG Overview

Network Controller & Processor ICs 10MHz CMOS ESCC

Z8023010VSG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Zilog, Inc.
Parts packaging code	LCC
package instruction	QCCJ, LDCC44,.7SQ
Contacts	44
Reach Compliance Code	unknown
Other features	MODEM CONTROL I/OS USABLE AS GENERAL PURPOSE I/OS; 10 X 19 FRAME STATUS FIFO
Address bus width	8
boundary scan	NO
Bus compatibility	Z-BUS
maximum clock frequency	10 MHz
letter of agreement	ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC
Data encoding/decoding methods	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate	0.3125 MBps
External data bus width	8
JESD-30 code	S-PQCC-J44
JESD-609 code	e3
length	16.585 mm
low power mode	NO
Number of DMA channels
Number of I/O lines
Number of serial I/Os	2
Number of terminals	44
On-chip data RAM width
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC44,.7SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	260
power supply	5 V
Certification status	Not Qualified
RAM (number of words)	0
Maximum seat height	4.57 mm
Maximum slew rate	12 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	16.585 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL

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Z80230/Z85230/L

Enhanced Serial

Communications Controller

Product Specification

PS005308-0609

www.zilog.com

Z80230/Z85230/L

Product Specification

Table of Contents

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii

Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Descriptions 1

Pins Common to Both Z85230/L and Z80230 . . . . . . . . . . . . . . . . . . . . . . . . 4

Pin Descriptions Exclusive to the Z85230/L . . . . . . . . . . . . . . . . . . . . . . . . . 6

Pin Descriptions Exclusive to the Z80230 . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description 8

Input/Output Capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

ESCC Data Communications Capabilities . . . . . . . . . . . . . . . . . . . . . . . . . 15

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z80230/Z85230/L Enhancements 22

4-Byte Transmit FIFO Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

8-Byte Receive FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Write Register 7 PRIME (WR7’) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

CRC Reception in SDLC Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

TxD Forced High in SDLC with NRZI Encoding When Marking Idle . . . . . . 26

Improved Transmit Interrupt Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

DPLL Counter Tx Clock Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Read Register 0 Status Latched During Read Cycle . . . . . . . . . . . . . . . . . 27

Software Interrupt Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Fast SDLC Transmit Data Interrupt Response . . . . . . . . . . . . . . . . . . . . . . 28

SDLC FIFO Frame Status Enhancement . . . . . . . . . . . . . . . . . . . . . . . . . . 28

FIFO Enable/Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

FIFO Read Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

FIFO Write Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

SDLC Status FIFO Anti-Lock Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming 32

Initializing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Write Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Read Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z80230 Interface Timing 70

Z80230 Write Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

Z80230 Read Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Z80230 Interrupt Acknowledge Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . 71

Z85230/L Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Z85230/L Read Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

PS005308-0609

Table of Contents

Z80230/Z85230/L

Product Specification

Z85230/L Write Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Z85230/L Interrupt Acknowledge Cycle Timing . . . . . . . . . . . . . . . . . . . . . . 74

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics 75

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Standard Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Z85230/L AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Z80230/Z85230/L Errata 99

IUS Problem Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

IUS Problem Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

RTS Problem Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

RTS Problem Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

Automatic TxD Forced High Problem Description . . . . . . . . . . . . . . . . . . . 102

Automatic TxD Forced High Problem Solutions . . . . . . . . . . . . . . . . . . . . 103

SDLC FIFO Overflow Problem Description . . . . . . . . . . . . . . . . . . . . . . . . 103

SDLC FIFO Overflow Problem Solution . . . . . . . . . . . . . . . . . . . . . . . . . . 103

Default RR0 Value Problem Description . . . . . . . . . . . . . . . . . . . . . . . . . . 103

Default RR0 Value Problem Solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

Default RR10 Value Problem Description . . . . . . . . . . . . . . . . . . . . . . . . . 104

Default RR10 Value Problem Solution . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

CRC Problem Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

CRC Problem Solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package Information 105

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ordering Information 107

Z8523L (3.3V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

Z85230 (5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

Part Number Suffix Designation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Customer Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

PS005308-0609

Table of Contents

Z8023010VSG Related Products

	Z8023010VSG	Z8023010PSG	Z8523L16VSG	Z8523020PSG	Z8523010VEG	Z8023016VSG	Z8523008PEG	Z8023016PSG	Z8523008PSG	Z8523008VSG
Description	Network Controller & Processor ICs 10MHz CMOS ESCC	Network Controller & Processor ICs 10MHz CMOS ESCC	Network Controller & Processor ICs 16 Mhz ESCC	Network Controller & Processor ICs 20MHz ESCC	Network Controller & Processor ICs 10MHz ESCC XTEMP	Network Controller & Processor ICs 16MHz CMOS ESCC	Network Controller & Processor ICs 8MHz ESCC XTEMP	Network Controller & Processor ICs 16MHz CMOS ESCC	Network Controller & Processor ICs 8MHz ESCC	Network Controller & Processor ICs 8MHz ESCC
Is it lead-free?	Lead free	Lead free	-	Lead free	Lead free	-	Lead free	-	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	-	conform to	conform to	-	conform to	-	conform to	conform to
Maker	Zilog, Inc.	Zilog, Inc.	-	Zilog, Inc.	-	-	Zilog, Inc.	-	Zilog, Inc.	Zilog, Inc.
Parts packaging code	LCC	DIP	LCC	DIP	LCC	-	DIP	-	DIP	LCC
package instruction	QCCJ, LDCC44,.7SQ	DIP, DIP40,.6	QCCJ, LDCC44,.7SQ	DIP, DIP40,.6	QCCJ, LDCC44,.7SQ	-	DIP, DIP40,.6	-	DIP, DIP40,.6	QCCJ, LDCC44,.7SQ
Contacts	44	40	44	40	44	-	40	-	40	44
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	-	unknown	-	unknown	unknown
boundary scan	NO	NO	NO	NO	NO	-	NO	-	NO	NO
Bus compatibility	Z-BUS	Z-BUS	Z-BUS	Z-BUS	Z-BUS	-	Z-BUS	-	Z-BUS	Z-BUS
maximum clock frequency	10 MHz	10 MHz	-	20 MHz	10 MHz	-	8 MHz	-	8 MHz	8 MHz
letter of agreement	ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC	ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC	ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC	ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC	ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC	-	ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC	-	ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC	ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC
Data encoding/decoding methods	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	-	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	-	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate	0.3125 MBps	0.3125 MBps	-	0.625 MBps	0.3125 MBps	-	0.25 MBps	-	0.25 MBps	0.25 MBps
External data bus width	8	8	8	8	8	-	8	-	8	8
JESD-30 code	S-PQCC-J44	R-PDIP-T40	S-PQCC-J44	R-PDIP-T40	S-PQCC-J44	-	R-PDIP-T40	-	R-PDIP-T40	S-PQCC-J44
JESD-609 code	e3	e3	-	e3	e3	-	e3	-	e3	e3
length	16.585 mm	52.325 mm	16.585 mm	52.325 mm	16.585 mm	-	52.325 mm	-	52.325 mm	16.585 mm
low power mode	NO	NO	NO	NO	NO	-	NO	-	NO	NO
Number of serial I/Os	2	2	2	2	2	-	2	-	2	2
Number of terminals	44	40	44	40	44	-	40	-	40	44
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	100 °C	-	100 °C	-	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QCCJ	DIP	QCCJ	DIP	QCCJ	-	DIP	-	DIP	QCCJ
Encapsulate equivalent code	LDCC44,.7SQ	DIP40,.6	LDCC44,.7SQ	DIP40,.6	LDCC44,.7SQ	-	DIP40,.6	-	DIP40,.6	LDCC44,.7SQ
Package shape	SQUARE	RECTANGULAR	SQUARE	RECTANGULAR	SQUARE	-	RECTANGULAR	-	RECTANGULAR	SQUARE
Package form	CHIP CARRIER	IN-LINE	CHIP CARRIER	IN-LINE	CHIP CARRIER	-	IN-LINE	-	IN-LINE	CHIP CARRIER
Peak Reflow Temperature (Celsius)	260	NOT SPECIFIED	-	NOT SPECIFIED	260	-	NOT SPECIFIED	-	NOT SPECIFIED	260
power supply	5 V	5 V	3.3 V	5 V	5 V	-	5 V	-	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	-	Not Qualified	-	Not Qualified	Not Qualified
Maximum seat height	4.57 mm	4.24 mm	4.57 mm	4.24 mm	4.57 mm	-	4.24 mm	-	4.24 mm	4.57 mm
Maximum slew rate	12 mA	12 mA	6 mA	20 mA	12 mA	-	10 mA	-	10 mA	10 mA
Maximum supply voltage	5.5 V	5.5 V	3.6 V	5.5 V	5.5 V	-	5.5 V	-	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V	3 V	4.5 V	4.5 V	-	4.5 V	-	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	3.3 V	5 V	5 V	-	5 V	-	5 V	5 V
surface mount	YES	NO	YES	NO	YES	-	NO	-	NO	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	-	CMOS	-	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	-	INDUSTRIAL	-	COMMERCIAL	COMMERCIAL
Terminal surface	Matte Tin (Sn)	Matte Tin (Sn)	-	Matte Tin (Sn)	Matte Tin (Sn)	-	Matte Tin (Sn)	-	Matte Tin (Sn)	Matte Tin (Sn)
Terminal form	J BEND	THROUGH-HOLE	J BEND	THROUGH-HOLE	J BEND	-	THROUGH-HOLE	-	THROUGH-HOLE	J BEND
Terminal pitch	1.27 mm	2.54 mm	1.27 mm	2.54 mm	1.27 mm	-	2.54 mm	-	2.54 mm	1.27 mm
Terminal location	QUAD	DUAL	QUAD	DUAL	QUAD	-	DUAL	-	DUAL	QUAD
Maximum time at peak reflow temperature	40	NOT SPECIFIED	-	NOT SPECIFIED	40	-	NOT SPECIFIED	-	NOT SPECIFIED	40
width	16.585 mm	15.24 mm	16.585 mm	15.24 mm	16.585 mm	-	15.24 mm	-	15.24 mm	16.585 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL	-	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL	-	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL

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