CS5331A-KSR datasheet, PDF - EEWORLD Datasheet

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CS5331A-KSR: DescriptionAudio A/D Converter ICs IC 8-Pin Stereo ADC; CategoryAnalog mixed-signal IC converter; File Size172KB，17 Pages; ManufacturerCirrus Logic; Websitehttp://www.cirrus.com

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Audio A/D Converter ICs IC 8-Pin Stereo ADC

CS5331A-KSR Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Cirrus Logic
Parts packaging code	SOIC
package instruction	SOP, SOP8,.3
Contacts	8
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum analog input voltage	4.4 V
Minimum analog input voltage	3.6 V
Converter type	ADC, DELTA-SIGMA
JESD-30 code	R-PDSO-G8
JESD-609 code	e0
length	5.29 mm
Number of analog input channels	2
Number of digits	18
Number of functions	1
Number of terminals	8
Maximum operating temperature	70 °C
Minimum operating temperature	-10 °C
Output bit code	2\'S COMPLEMENT BINARY
Output format	SERIAL
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP8,.3
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	240
power supply	5 V
Certification status	Not Qualified
Sample and hold/Track and hold	SAMPLE
Maximum seat height	2.13 mm
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	5.25 mm

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CS5330A/31A

8-Pin, Stereo A/D Converter for Digital Audio

Features



Single +5 V Power Supply



18-Bit Resolution



94 dB Dynamic Range



Linear Phase Digital Anti-Alias Filtering

General Description

The CS5330A/31A is a complete stereo analog-to-digi-

tal converter that performs antialias filtering, sampling

and analog-to-digital conversion generating 18-bit val-

ues for both left and right inputs in serial form. The

output sample rate can be infinitely adjusted between

2 kHz and 50 kHz.

The CS5330A/31A operates from a single +5 V supply

and requires only 150 mW for normal operation, making

it ideal for battery-powered applications.

The ADC uses delta-sigma modulation with 128X over-

sampling, followed by digital filtering and decimation,

which removes the need for an external anti-alias filter.

The linear-phase digital filter has a passband to

21.7 kHz, 0.05 dB passband ripple and >80 dB stop-

band rejection. The device also contains a high-pass fil-

ter to remove DC offsets.

The device is available in an 8-pin SOIC package in

both Commercial (

-10° to +70° C) and

Automotive grades

(-40° to +85° C)

. Please refer to

“Ordering Information” on

page 16

for complete details.

–

0.05 dB Passband Ripple

80 dB Stopband Rejection

Power-Down Mode for Portable

Applications

Delta-Sigma A/D Converters

Digital Anti-Alias Filtering

S/H Circuitry and Voltage Reference



Low Power Dissipation: 150 mW



Complete CMOS Stereo A/D System

–



Adjustable System Sampling Rates including

32, 44.1, and 48 kHz

MCLK

Voltage Reference

SCLK

LRCK

SDATA

Serial Output Interface

LP Filter

S/H

DAC

Digital Decimation

Filter

Comparator

DAC

VA+

High

Pass

Filter

Digital Decimation

Filter

Comparator

AINL

High

Pass

Filter

AINR

S/H

LP Filter

AGND

http://www.cirrus.com



Cirrus Logic, Inc. 2011

MAY '11

DS138F6

CS5330A/31A

TABLE OF CONTENTS

1. PIN DESCRIPTIONS ................................................................................................................ 3

2. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 4

SPECIFIED OPERATING CONDITIONS ................................................................................. 4

ABSOLUTE MAXIMUM RATINGS ........................................................................................... 4

ANALOG INPUT CHARACTERISTICS .................................................................................... 5

DIGITAL CHARACTERISTICS................................................................................................. 6

DIGITAL FILTER CHARACTERISTICS ................................................................................... 6

SWITCHING CHARACTERISTICS .......................................................................................... 7

3. GENERAL DESCRIPTION ....................................................................................................... 9

3.1 System Design .................................................................................................................. 9

3.1.1 Master Clock ......................................................................................................... 9

3.1.2 Serial Data Interface ............................................................................................ 9

3.1.3 Master Mode ......................................................................................................... 9

3.1.4 Slave Mode ......................................................................................................... 10

3.1.5 CS5330A ............................................................................................................. 10

3.1.6 CS5331A ............................................................................................................. 10

3.1.7 Analog Connections ............................................................................................ 11

3.1.8 High-Pass Filter .................................................................................................. 11

3.1.9 Initialization and Power-Down ............................................................................. 11

3.1.10 Grounding and Power Supply Decoupling ........................................................ 12

3.1.11 Digital Filter ....................................................................................................... 13

4. PARAMETER DEFINITIONS .................................................................................................. 14

5. REFERENCES ........................................................................................................................ 15

6. PACKAGE DESCRIPTIONS .................................................................................................. 15

7. ORDERING INFORMATION ................................................................................................. 16

8. REVISION HISTORY .............................................................................................................. 16

LIST OF FIGURES

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Figure 7.

Figure 8.

Typical Connection Diagram......................................................................................... 8

Data Output Timing-CS5330A .................................................................................... 10

Data Output Timing - CS5331A (I²S Compatible) ....................................................... 10

CS5330A/31A Initialization and Power-Down Sequence............................................ 12

CS5330A/31A Digital Filter Stopband Rejection......................................................... 13

CS5330A/31A Digital Filter Transition Band ............................................................... 13

CS5330A/31A Digital Filter Passband Ripple ............................................................. 13

CS5330A/31A Digital Filter Transition Band ............................................................... 13

LIST OF TABLES

Table 1.

Common Clock Frequencies......................................................................................... 9

DS138F6

CS5331A-KSR Related Products

	CS5331A-KSR	CS5330A-KS	CS5331A-KS	CS5330A-BSR
Description	Audio A/D Converter ICs IC 8-Pin Stereo ADC	Audio A/D Converter ICs IC 8-Pin Stereo ADC	Audio A/D Converter ICs IC 8-Pin Stereo ADC	Audio A/D Converter ICs IC 8-Pin Stereo ADC
Is it lead-free?	Contains lead	Contains lead	-	Contains lead
Is it Rohs certified?	incompatible	incompatible	-	incompatible
Maker	Cirrus Logic	Cirrus Logic	-	Cirrus Logic
Parts packaging code	SOIC	SOIC	-	SOIC
package instruction	SOP, SOP8,.3	SOP, SOP8,.3	-	SOP, SOP8,.3
Contacts	8	8	-	8
Reach Compliance Code	compliant	compliant	-	compliant
ECCN code	EAR99	EAR99	-	EAR99
Maximum analog input voltage	4.4 V	4.4 V	-	4.4 V
Minimum analog input voltage	3.6 V	3.6 V	-	3.6 V
Converter type	ADC, DELTA-SIGMA	ADC, DELTA-SIGMA	-	ADC, DELTA-SIGMA
JESD-30 code	R-PDSO-G8	R-PDSO-G8	-	R-PDSO-G8
JESD-609 code	e0	e0	-	e0
length	5.29 mm	5.29 mm	-	5.29 mm
Number of analog input channels	2	2	-	2
Number of digits	18	18	-	18
Number of functions	1	1	-	1
Number of terminals	8	8	-	8
Maximum operating temperature	70 °C	70 °C	-	85 °C
Minimum operating temperature	-10 °C	-10 °C	-	-40 °C
Output bit code	2\'S COMPLEMENT BINARY	2\'S COMPLEMENT BINARY	-	2\'S COMPLEMENT BINARY
Output format	SERIAL	SERIAL	-	SERIAL
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY
encapsulated code	SOP	SOP	-	SOP
Encapsulate equivalent code	SOP8,.3	SOP8,.3	-	SOP8,.3
Package shape	RECTANGULAR	RECTANGULAR	-	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	-	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	240	240	-	240
power supply	5 V	5 V	-	5 V
Certification status	Not Qualified	Not Qualified	-	Not Qualified
Sample and hold/Track and hold	SAMPLE	SAMPLE	-	SAMPLE
Maximum seat height	2.13 mm	2.13 mm	-	2.13 mm
Nominal supply voltage	5 V	5 V	-	5 V
surface mount	YES	YES	-	YES
technology	CMOS	CMOS	-	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	-	INDUSTRIAL
Terminal surface	TIN LEAD	Tin/Lead (Sn/Pb)	-	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	GULL WING	-	GULL WING
Terminal pitch	1.27 mm	1.27 mm	-	1.27 mm
Terminal location	DUAL	DUAL	-	DUAL
Maximum time at peak reflow temperature	30	30	-	30
width	5.25 mm	5.25 mm	-	5.25 mm

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