CS5330A/31A
8-Pin, Stereo A/D Converter for Digital Audio
Features
Single +5 V Power Supply
18-Bit Resolution
94 dB Dynamic Range
Linear Phase Digital Anti-Alias Filtering
General Description
The CS5330A/31A is a complete stereo analog-to-digi-
tal converter that performs antialias filtering, sampling
and analog-to-digital conversion generating 18-bit val-
ues for both left and right inputs in serial form. The
output sample rate can be infinitely adjusted between
2 kHz and 50 kHz.
The CS5330A/31A operates from a single +5 V supply
and requires only 150 mW for normal operation, making
it ideal for battery-powered applications.
The ADC uses delta-sigma modulation with 128X over-
sampling, followed by digital filtering and decimation,
which removes the need for an external anti-alias filter.
The linear-phase digital filter has a passband to
21.7 kHz, 0.05 dB passband ripple and >80 dB stop-
band rejection. The device also contains a high-pass fil-
ter to remove DC offsets.
The device is available in an 8-pin SOIC package in
both Commercial (
-10° to +70° C) and
Automotive grades
(-40° to +85° C)
. Please refer to
“Ordering Information” on
page 16
for complete details.
–
–
–
0.05 dB Passband Ripple
80 dB Stopband Rejection
Power-Down Mode for Portable
Applications
Delta-Sigma A/D Converters
Digital Anti-Alias Filtering
S/H Circuitry and Voltage Reference
Low Power Dissipation: 150 mW
Complete CMOS Stereo A/D System
–
–
–
Adjustable System Sampling Rates including
32, 44.1, and 48 kHz
MCLK
4
Voltage Reference
SCLK
2
LRCK
3
1
SDATA
Serial Output Interface
8
LP Filter
S/H
DAC
Digital Decimation
Filter
Comparator
DAC
7
VA+
High
Pass
Filter
Digital Decimation
Filter
Comparator
AINL
High
Pass
Filter
AINR
5
S/H
LP Filter
AGND
6
http://www.cirrus.com
Copyright
Cirrus Logic, Inc. 2011
(All Rights Reserved)
MAY '11
DS138F6
CS5330A/31A
TABLE OF CONTENTS
1. PIN DESCRIPTIONS ................................................................................................................ 3
2. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 4
SPECIFIED OPERATING CONDITIONS ................................................................................. 4
ABSOLUTE MAXIMUM RATINGS ........................................................................................... 4
ANALOG INPUT CHARACTERISTICS .................................................................................... 5
DIGITAL CHARACTERISTICS................................................................................................. 6
DIGITAL FILTER CHARACTERISTICS ................................................................................... 6
SWITCHING CHARACTERISTICS .......................................................................................... 7
3. GENERAL DESCRIPTION ....................................................................................................... 9
3.1 System Design .................................................................................................................. 9
3.1.1 Master Clock ......................................................................................................... 9
3.1.2 Serial Data Interface ............................................................................................ 9
3.1.3 Master Mode ......................................................................................................... 9
3.1.4 Slave Mode ......................................................................................................... 10
3.1.5 CS5330A ............................................................................................................. 10
3.1.6 CS5331A ............................................................................................................. 10
3.1.7 Analog Connections ............................................................................................ 11
3.1.8 High-Pass Filter .................................................................................................. 11
3.1.9 Initialization and Power-Down ............................................................................. 11
3.1.10 Grounding and Power Supply Decoupling ........................................................ 12
3.1.11 Digital Filter ....................................................................................................... 13
4. PARAMETER DEFINITIONS .................................................................................................. 14
5. REFERENCES ........................................................................................................................ 15
6. PACKAGE DESCRIPTIONS .................................................................................................. 15
7. ORDERING INFORMATION ................................................................................................. 16
8. REVISION HISTORY .............................................................................................................. 16
LIST OF FIGURES
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Typical Connection Diagram......................................................................................... 8
Data Output Timing-CS5330A .................................................................................... 10
Data Output Timing - CS5331A (I²S Compatible) ....................................................... 10
CS5330A/31A Initialization and Power-Down Sequence............................................ 12
CS5330A/31A Digital Filter Stopband Rejection......................................................... 13
CS5330A/31A Digital Filter Transition Band ............................................................... 13
CS5330A/31A Digital Filter Passband Ripple ............................................................. 13
CS5330A/31A Digital Filter Transition Band ............................................................... 13
LIST OF TABLES
Table 1.
Common Clock Frequencies......................................................................................... 9
2
DS138F6
CS5330A/31A
1. PIN DESCRIPTIONS
SERIAL DATA OUTPUT
SERIAL DATA CLOCK
LEFT/RIGHT CLOCK
MASTER CLOCK
SDATA
SCLK
LRCK
MCLK
1
2
3
4
8
7
6
5
AINL
VA+
AGND
AINR
LEFT ANALOG INPUT
ANALOG POWER
ANALOG GROUND
RIGHT ANALOG INPUT
Pin Name
SDATA
#
1
Pin Description
Audio Serial Data Output
(Output)
-
Two’s complement MSB-first serial data is output on this
pin. A 47 k resistor on this pin will place the CS5330A/31A into Master Mode.
Serial Data Clock
(Input/Output)
-
SCLK is an input clock at any frequency from 32x to 64x the
output word rate. SCLK can also be an output clock at 64x if in the Master Mode. Data is
clocked out on the falling edge of SCLK.
Left/Right Clock
(Input/Output)
-
LRCK selects the left or right channel for output on SDATA.
The LRCK frequency must be at the output sample rate. LRCK is an output clock if in Master
Mode. Although the outputs of each channel are transmitted at different times, the two words in
an LRCK cycle represent simultaneously sampled analog inputs.
Master Clock Input
(Input) - Source for the delta-sigma modulator sampling and digital filter
clock. Sample rates and digital filter characteristics scale to the MCLK frequency.
Analog Right Channel Input
(Input)
-
Analog input for the right channel. Typically 4 Vpp for a
full-scale input signal.
Analog Ground
(Input) - Analog ground reference.
Positive Analog Power
(Input)
-
Positive analog supply (Nominally +5 V).
Analog Left Channel Input
(Input) - Analog input for the left channel. Typically 4 Vpp for a full-
scale input signal.
SCLK
2
LRCK
3
MCLK
AINR
AGND
VA+
AINL
4
5
6
7
8
DS138F6
3
CS5330A/31A
2. CHARACTERISTICS AND SPECIFICATIONS
(All Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. Typical
performance characteristics and specifications are derived from measurements taken at nominal supply voltages
and T
A
= 25C.)
SPECIFIED OPERATING CONDITIONS
(AGND = 0V, all voltages with respect to ground)
Parameter
Analog Supply Voltage
Ambient Operating Temperature (Power Applied)
KSZ
BSZ, DSZ
Symbol
VA+
T
A
Min
4.75
-10
-40
Typ
5.0
-
-
Max
5.25
+70
+85
Unit
V
°C
°C
ABSOLUTE MAXIMUM RATINGS
(AGND = 0V, all voltages with respect to ground.)
(Note 1)
Parameter
Analog Supply Voltage
Input Current, Any Pin Except Supplies
Analog Input Voltage
Digital Input Voltage
Ambient Temperature (power applied)
Storage Temperature
Notes:
1. Operation at or beyond these limits may result in permanent damage to the device. Normal operation
is not guaranteed at these extremes.
2. Any pin except supplies. Transient current of up to +/- 100 mA on the analog input pins will not cause
SCR latch-up.
3. The maximum over/under voltage is limited by the input current.
(Note 2)
(Note 3)
(Note 3)
Symbol
VA+
lin
V
INA
V
IND
T
A
T
stg
Min
-0.3
-
-0.7
-0.7
-55
-65
Typ
-
-
-
-
-
-
Max
+6.0
±10
VA+0.7
VA+0.7
+125
+150
Unit
V
mA
V
V
°C
°C
4
DS138F6
CS5330A/31A
ANALOG INPUT CHARACTERISTICS
(-1 dBFS input sine wave, 997 Hz; Measurement Bandwidth is 10 Hz to 20 kHz unless otherwise specified; Logic
0 = 0V, Logic 1 = VD+)
CS5330A-BSZ
CS5331A-DSZ
Min
Typ
Max
86
84
-
-
-
-
-
-
-
-
-
-
3.6
-
2.2
-
-
-
-
-
94
92
-84
-72
-32
0.003
0
90
0.1
-
150
-
4.0
100
2.4
30
100
150
0.5
50
-
-
75
66
26
0.2
-
-
-
±10
-
0
4.4
-
2.6
42
1000
220
5.25
-
Parameter
Dynamic Performance
Dynamic Range
CS5330A/31A-KSZ
Symbol Min
Typ
Max
A-weighted
unweighted
88
86
-
-
-
-
-
-
-
-
-
-
VIN
ZIN
3.6
-
2.2
IA+
-
-
-
-
94
92
-84
-72
-32
0.003
0
90
0.1
-
150
-
4.0
100
2.4
30
100
150
0.5
-
-
75
66
26
0.02
-
-
-
±10
-
0
4.4
-
2.6
42
1000
220
5.25
-
Unit
dB
dB
dB
dB
dB
%
Degree
dB
dB
%
ppm/°C
LSB
Vpp
k
V
mA
µA
mW
mW
dB
Total Harmonic Distortion + Noise
(Note 4)
-1 dB
THD+N
-20 dB
-60 dB
Total Harmonic Distortion
-1 dB
Interchannel Phase Deviation
Interchannel Isolation
(DC to 20 kHz)
DC Accuracy
Interchannel Gain Mismatch
Gain Error
Gain Drift
Offset Error
(Note 5)
Analog Input
Full-scale Input Voltage
Input Impedance
(Fs = 48 kHz)
Input Bias Voltage
Power Supplies
Power Supply Current
VA+
Power down
THD
Power Dissipation
Normal
Power down
PSRR
-
50
Power Supply Rejection Ratio
* Refer to Parameter Definitions at the end of this data sheet.
4. Referenced to typical full-scale input voltage.
5. Internal highpass filter removes offset.
DS138F6
5
PCB Design
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